Efficient data read operation

ABSTRACT

In response to receiving a read metadata request from the host system for a data portion, the storage system may determine a status and location of the data portion, including determining whether the data portion is in a cache of the storage system. If the data portion is in the cache, the storage system may send a response that includes the data portion itself along with the status and location of the data portion. If the data portion is not in the cache, the storage system may send a response to the read metadata request that includes the status and location of the data portion, but not the data portion itself. The host system may be configured to determine whether the data portion has been returned with the metadata response, and if so, refrain from sending a separate data request, for example, to retrieve the data portion from cache.

BACKGROUND Technical Field

This application generally relates to data storage systems, and more particularly to reading cached data on a data storage system.

Description of Related Art

Data storage systems (often referred to herein simply as “storage systems”) may include storage resources used by one or more host systems (sometimes referred to herein as “hosts”), i.e., servers, to store data. One or more storage systems and one or more host systems may be interconnected by one or more network components, for example, as part of a switching fabric, to form a data storage network (often referred to herein simply as “storage network”). Storage systems may provide any of a variety of data services to host systems of the storage network.

A host system may have host applications that utilize the data services provided by one or more storage systems of the storage network to store data on the physical storage devices (e.g., tape, disks or solid state devices) thereof. For a given application, to perform input/output (TO) operations utilizing a physical storage device of the storage system, one or more components of the host system, storage system and network components therebetween may be used. Each of the one or more combinations of these components over which IO operations between an application and a physical storage device can be performed may be considered an IO path between the application and the physical storage device. These IO paths collectively define a connectivity of the storage network.

SUMMARY OF THE INVENTION

In some embodiments, a method is performed on a data storage system. The method includes receiving an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from the storage system, in response to receiving the instruction, determining whether the data portion is present in a cache of the data storage system, and, if the data portion is present in the cache, sending a response to the instruction that includes a location of the data portion in the cache and the data portion itself. The method may include sending, if the data portion is not present in the cache, a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself. The method may include refraining from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction. The method may include sending the instruction from a host system to the data storage system. The host system may be directly connected to an internal fabric of the storage system, and the instruction may be sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system. The instruction may be sent in response to receiving the read request from the host application. The storage system may include an operating system and a storage system interconnect directly connected to an internal fabric of the storage system, and the operating system may communicate with the storage system interface over one or more peripheral device interconnects, and the operating system may receive the read request specifying a read operation, and, in response to receiving the read request, send an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface, and the storage system interface may send the instruction in response to receiving the IO communication from the operating system.

In some embodiments, a data storage system includes a cache, one or more processors, and a memory including code thereon that, when executed, performs a method including receiving an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from the storage system, in response to receiving the instruction, determining whether the data portion is present in the cache, and, if the data portion is present in the cache, sending a response to the instruction that includes a location of the data portion in the cache and the data portion itself. The method may further include sending, if the data portion is not present in the cache, a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself. The method may further include refraining from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction. The method may further include sending the instruction from a host system to the data storage system. The host system may be directly connected to an internal fabric of the storage system, and the instruction may be sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system. The instruction may be sent in response to receiving the read request from the host application. The storage system may include an operating system and a storage system interconnect directly connected to an internal fabric of the storage system, and the operating system may communicate with the storage system interface over one or more peripheral device interconnects. The method may include the operating system receiving the read request specifying a read operation, in response to receiving the read request, the operating system sending an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface, and the storage system interface sending the instruction in response to receiving the IO communication from the operating system.

In some embodiments, one or more computer-readable media, for example, non-transitory computer-readable media, are provided having software stored thereon, the software including executable code that includes executable code that receives an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from a storage system, executable code that, in response to receiving the instruction, determines whether the data portion is present in a cache of the storage system, and executable code that, if the data portion is present in the cache, sends a response to the instruction that includes a location of the data portion in the cache and the data portion itself. The software may include executable code that, if the data portion may not be present in the cache, controls sending a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself. The software may include executable code that refrains from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction. The software may include executable code that controls sending the instruction from a host system to the data storage system. The host system may be directly connected to an internal fabric of the storage system, and the instruction may be sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system. The instruction may be sent in response to receiving the read request from the host application. The storage system may include an operating system and a storage system interconnect directly connected to an internal fabric of the storage system. The operating system may communicate with the storage system interface over one or more peripheral device interconnects. The software may include executable code that controls the operating system to receive the read request specifying a read operation, and, in response to receiving the read request, to send an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface, and executable code that controls the storage system interface to send the instruction in response to receiving the IO communication from the operating system.

BRIEF DESCRIPTION OF THE DRAWINGS

Features and advantages of the present invention will become more apparent from the following detailed description of illustrative embodiments thereof taken in conjunction with the accompanying drawings in which:

FIG. 1 is a block diagram illustrating an example of a data storage network, according to embodiments of the invention;

FIG. 2 is a block diagram illustrating an example of a storage system including multiple circuit boards, according to embodiments of the invention;

FIG. 3A is a block diagram illustrating an example of tables defining relationships between logical storage units and physical storage devices on a data storage system, according to embodiments of the invention;

FIG. 3B a block diagram illustrating an example of a table used for a thin logical device, according to embodiments of the invention;

FIG. 3C is a block diagram illustrating an example of a data structure for mapping logical storage unit tracks to cache slots, according to embodiments of the invention;

FIG. 4 is a block diagram illustrating an example of a system including a host system communicatively coupled to a data storage system via multiple IO paths, according to embodiments of the invention;

FIG. 5 is a block diagram illustrating an example of a plurality of logical layers of a combination of a host system and a data storage system for processing an IO request, according to embodiments of the invention;

FIG. 6 is a block diagram illustrating an example of a data storage network, including one or more host systems directly connected to internal fabric of a storage system, according to embodiments of the invention.

FIG. 7 is a block diagram illustrating an example of a storage system interface of a host system directly connected to internal fabric of a storage system, according to embodiments of the invention;

FIG. 8A is a flowchart illustrating an example of a method of processing an IO request on a system in which a host system is directly connected to internal fabric of a storage system, according to embodiments of the invention;

FIG. 8B is a flowchart illustrating an example of a method of processing a read operation, according to embodiments of the invention;

FIG. 9 is a timing diagram illustrating an example of a method of performing a write operation, according to embodiments of the invention;

FIG. 10 is a timing diagram illustrating an example of a method of a host system reading data directly from a cache of a storage system, according to embodiments of the invention;

FIG. 11 is a timing diagram illustrating an example of a host system reading data from a physical storage device of a storage system independent of any director, according to embodiments of the invention; and

FIG. 12 is a flow chart illustrating an example of a method of performing a read operation, according to embodiments of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS

In some embodiments of the invention, a host system may be directly connected to an internal switching fabric (“internal fabric”) of the data storage system without an intervening component of the storage system (e.g., a director) controlling access of the host system to the internal fabric. For example, the host system may include a storage system interface (SSI) physically connected to a remainder of the host system by one or more interconnects or busses (e.g., in accordance with PCIe technology), and which may be physically connected directly to the internal fabric of the data storage system. Such direct connection to the internal fabric may reduce (e.g., substantially) IO (e.g., read and write) response times and access times to other information (e.g., metadata) on the storage system.

In such embodiments, and perhaps in other embodiments, in response to receiving from an application executing on the host system a read request specifying a read operation for a data portion stored on the storage system, rather than sending an IO communication to a director of the storage system to handle the read request, the host system (e.g., the SSI of the host system) may send a read metadata instruction (i.e., a command) to the storage system to determine a state and/or location of the data portion. Regarding state, it may be determined, for example, that the data portion is in a complex state; i.e., more specifically that the logical storage unit (e.g., LUN or namespace) of the data portion is in a complex state, e.g., in which the data portion is currently unavailable because one or more data services are currently being performed on the LSU, or is in a normal (i.e., non-complex) state. The location may include a cache of the storage system or a location on physical storage device (e.g., disk or flash drive) of the storage system. In response to the instruction, the storage system may send a metadata response to the host system (e.g., the SSI of the host system) indicating the state and/or location (e.g., cache of physical storage device) of the data portion.

In some embodiments, if it is determined from the metadata response that the data portion is in a complex state, then the host system may determine to allow a director of the storage system to handle the read operation in accordance with known techniques (i.e., the host system “punts” the read operation to the director); whereas, if it is determined from the metadata response that the data portion is in a normal state, the host system then may send a read data request directed to the location specified by the metadata response, e.g., to the cache or specified physical storage device, in response to which the cache or physical storage device may provide the data portion. The host system handling a read request by sending a data request directly to cache or a physical storage device without use of a director may be referred to herein as a “direct read” or “direct read operation.” A direct read operation also includes, prior to sending the data read request, sending a metadata request to the storage system, e.g., to a director (or the like) or directly to the global memory without use of a director. Thus, at least four communications may be exchanged between the host system and the storage system for a direct read operation—the read metadata request, the metadata response, the read data request and the response thereto.

To reduce I/O latency further, it may be desirable to reduce the number of communications exchanged between a host system and a storage system in performing a direct read operation, at least in some circumstances.

Described herein are mechanisms and techniques to reduce the number of communications exchanged between a host system and the storage system in performing a direct read operation to retrieve data from the storage system in response to a read request from a host application, for example, when the requested data is in a cache of the storage system.

In some embodiments, in response to receiving a read metadata request from the host system (e.g., from an SSI of the host system) for a data portion, the storage system may determine a state and location of the data portion, including determining whether the data portion is in a cache of the storage system. If the data portion is in the cache, the storage system may send a response to the read metadata request that includes the data portion itself along with the state and location of the data portion. If the data portion is not in the cache, the storage system may send a response to the read metadata request that includes the state and location of the data portion, but not the data portion itself. The host system may be configured to determine whether the data portion has been returned with the metadata response, and if so, to extract the data portion and refrain from sending a separate data request, for example, to retrieve the data portion from cache. If the data portion has not been returned with the metadata, the host system then may send a data request to retrieve the data portion, for example, from a physical storage device.

The host system may be configured to include information (e.g., a flag) in metadata requests indicating that the host system is capable of processing metadata responses that include the data portion itself. The storage system (e.g., a director thereof) may be configured to determine from a metadata request (e.g., from reading a flag within) whether the requesting host system is capable of reading (e.g., extracting) a data portion appended to a metadata response, and may be configured to append a data portion to a metadata response if it determines that the requesting host system is capable of reading it from the metadata response.

Illustrative embodiments of the invention will now be described in more detail in relation to the figures.

FIG. 1 illustrates an example of an embodiment of a data storage network 10 (often referred to herein as a “storage network”). The storage network 10 may include any of: host systems (i.e., “hosts”) 14 a-n; network 18; one or more storage systems 20 a-n; other components; or any suitable combination of the foregoing. Storage systems 20 a-n, connected to host systems 14 a-n through network 18, may collectively constitute a distributed storage system 20. All of the host computers 14 a-n and storage systems 20 a-n may be located at the same physical site, or, alternatively, two or more host computers 14 a-n and/or storage systems 20 a-n may be located at different physical locations. Storage network 10 or portions thereof (e.g., one or more storage systems 20 a-n in combination with network 18) may be any of a variety of types of storage networks, such as, for example, a storage area network (SAN), e.g., of a data center. Embodiments of the invention are described herein in reference to storage system 20 a, but it should be appreciated that such embodiments may be implemented using other discrete storage systems (e.g., storage system 20 n), alone or in combination with storage system 20 a.

The N hosts 14 a-n may access the storage system 20 a, for example, in performing input/output (IO) operations or data requests, through network 18. For example, each of hosts 14 a-n may include one or more host bus adapters (HBAs) (not shown) that each include one or more host ports for connecting to network 18. The network 18 may include any one or more of a variety of communication media, switches and other components known to those skilled in the art, including, for example: a repeater, a multiplexer or even a satellite. Each communication medium may be any of a variety of communication media including, but not limited to: a bus, an optical fiber, a wire and/or other type of data link, known in the art. The network 18 may include at least a portion of the Internet, or a proprietary intranet, and components of the network 18 or components connected thereto may be configured to communicate in accordance with any of a plurality of technologies, including, for example: SCSI, ESCON, Fibre Channel (FC), iSCSI, FCoE, GIGE (Gigabit Ethernet), NVMe over Fabric (NVMeoF); other technologies, or any suitable combinations of the foregoing, each of which may have one or more associated standard specifications. In some embodiments, the network 18 may be, or include, a storage network fabric including one or more switches and other components. A network located externally to a storage system that connects host systems to storage system resources of the storage system, may be referred to herein as an “external network.”

Each of the host systems 14 a-n and the storage systems 20 a-n included in the storage network 10 may be connected to the network 18 by any one of a variety of connections as may be provided and supported in accordance with the type of network 18. The processors included in the host computer systems 14 a-n may be any one of a variety of proprietary or commercially available single or multi-processor system, such as an Intel-based processor, or other type of commercially available processor able to support traffic in accordance with each particular embodiment and application. Each of the host computer systems may perform different types of IO operations in accordance with different tasks and applications executing on the hosts. In the embodiment of FIG. 1, any one of the host computers 14 a-n may issue an IO request to the storage system 20 a to perform an IO operation. For example, an application executing on one of the host computers 14 a-n may perform a read or write operation resulting in one or more IO requests being transmitted to the storage system 20 a.

Each of the storage systems 20 a-n may be manufactured by different vendors and interconnected (not shown). Additionally, the storage systems 20 a-n also may be connected to the host systems through any one or more communication connections 31 that may vary with each particular embodiment and device in accordance with the different protocols used in a particular embodiment. The type of communication connection used may vary with certain system parameters and requirements, such as those related to bandwidth and throughput required in accordance with a rate of IO requests as may be issued by each of the host computer systems 14 a-n, for example, to the storage systems 20 a-20 n. It should be appreciated that the particulars of the hardware and software included in each of the components that may be included in the storage systems 20 a-n are described herein in more detail, and may vary with each particular embodiment.

Each of the storage systems, such as 20 a, may include a plurality of physical storage devices 24 (e.g., physical non-volatile storage devices) such as, for example, disk devices, solid-state storage devices (SSDs, e.g., flash, storage class memory (SCM), NVMe SSD, NVMe SCM) or even magnetic tape, and may be enclosed within a disk array enclosure (DAE) 27. In some embodiments, two or more of the physical storage devices 24 may be grouped or arranged together, for example, in an arrangement consisting of N rows of physical storage devices 24 a-n. In some embodiments, one or more physical storage devices (e.g., one of the rows 24 a-n of physical storage devices) may be connected to a back-end adapter (“BE”) (e.g., a director configured to serve as a BE) responsible for the backend management of operations to and from a portion of the physical storage devices 24. A BE is sometimes referred to by those in the art as a disk adapter (“DA”) because of the development of such adapters during a period in which disks were the dominant type of physical storage device used in storage systems, even though such so-called DAs may be configured to manage other types of physical storage devices (e.g., SSDs). In the system 20 a, a single BE, such as 23 a, may be responsible for the management of one or more (e.g., a row) of physical storage devices, such as row 24 a. That is, in some configurations, all IO communications with one or more physical storage devices 24 may be controlled by a specific BE. BEs 23 a-n may employ one or more technologies in communicating with, and transferring data to/from, physical storage devices 24, for example, SAS, SATA or NVMe. For NVMe, to enable communication between each BE and the physical storage devices that it controls, the storage system may include a PCIe switch for each physical storage device controlled by the BE; i.e., connecting the physical storage device to the controlling BE.

It should be appreciated that the physical storage devices are not limited to being arranged in rows. Further, the DAE 27 is not limited to enclosing disks, as the name may suggest, but may be constructed and arranged to enclose a plurality of any type of physical storage device, including any of those described herein, or combinations thereof.

The system 20 a also may include one or more host adapters (“HAs”) 21 a-n, which also are referred to herein as front-end adapters (“FAs”) (e.g., directors configured to serve as FAs). Each of these FAs may be used to manage communications and data operations between one or more host systems and GM 25 b of memory 26. The FA may be, or include, a Fibre Channel (FC) adapter if FC is a technology being used to communicate between the storage system 20 a and the one or more host systems 14 a-n, or may be another type of adapter based on the one or more technologies being used for IO communications.

Also shown in the storage system 20 a is a remote adapter (“RA”) 40. The RA may be, or include, hardware that includes a processor used to facilitate communication between storage systems (e.g., 20 a and 20 n), such as between two of the same or different types of storage systems, and/or may be implemented using a director.

Storage system 20 a also may include a management module 22, which may be configured (e.g., dedicated) to performing storage management functions or services such as, for example, storage provisioning, device configuration, tier management, other services, or any combination of other services. The management module may be configured to be accessed by only certain personnel (e.g., storage administrators, support engineers) and may have its own dedicated hardware, firmware, software, CPU resources and OS, and may be loaded with one or more applications, tools, CLIs, APIs and the like to enable management. In some embodiments, the management module, or portions thereof, may be located external to storage system 20 a, for example, as part of one of host systems 14 a-n or another separate system connected to storage system 20 a via network 18.

The FAs, BEs and RA may be collectively referred to herein as directors 37 a-n. Each director 37 a-n may include a processing core including compute resources, for example, one or more CPUs cores and/or a CPU complex for processing IO operations, and may be implemented on a circuit board, as described in more detail elsewhere herein. There may be any number of directors 37 a-n, which may be limited based on any of a number of factors, including spatial, computation and storage limitations. In an embodiment disclosed herein, there may be up to sixteen directors coupled to the memory 26. Other embodiments may use a higher or lower maximum number of directors.

System 20 a also may include an internal switching fabric (i.e., internal fabric) 30, which may include one or more switches, that enables internal communications between components of the storage system 20 a, for example, directors 37 a-n (FAs 21 a-n, BEs 23 a-n, RA 40, management module 22) and memory 26, e.g., to perform IO operations. One or more internal logical communication paths may exist between the directors and the memory 26, for example, over the internal fabric 30. For example, any of the directors 37 a-n may use the internal fabric 30 to communicate with other directors to access any of physical storage devices 24; i.e., without having to use memory 26. In addition, one of the directors 37 a-n may be able to broadcast a message to all of the other directors 37 a-n over the internal fabric 30 at the same time. Each of the components of system 20 a may be configured to communicate over internal fabric 30 in accordance with one or more technologies such as, for example, InfiniBand (IB), Ethernet, GenZ, another technology, or any suitable combination of the foregoing.

The GM portion 25 b may be used to facilitate data transfers and other communications between the directors 37 a-n in a storage system. In one embodiment, the directors 37 a-n (e.g., serving as FAs or BEs) may perform data operations using a cache 28 that may be included in the GM 25 b, for example, in communications with other directors, and other components of the system 20 a. The other portion 25 a is that portion of memory that may be used in connection with other designations that may vary in accordance with each embodiment. Global memory 25 b and cache 28 are described in more detail elsewhere herein. It should be appreciated that, although memory 26 is illustrated in FIG. 1 as being a single, discrete component of storage system 20 a, the invention is not so limited. In some embodiments, memory 26, or the GM 25 b or other memory 25 a thereof, may be distributed among a plurality of circuit boards (i.e., “boards”), as described in more detail elsewhere herein.

In at least one embodiment, write data received at the storage system from a host or other client may be initially written to cache 28 and marked as write pending. For example, cache 28 may be partitioned into one or more portions called cache slots, which may be a of a predefined uniform size, for example, 128 Kbytes. Write data of a write operation received at the storage system may be initially written (i.e., staged) in one or more of these cache slots and marked as write pending. Once written to cache 28, the host (e.g., one of 14 a-n) may be notified that the write operation has completed. At a later time, the write data may be de-staged from cache 28 to one or more physical storage devices 24 a-n, such as by a BE.

It should be noted that, although examples of techniques herein may be made with respect to a physical storage system and its physical components (e.g., physical hardware for each RA, BE, FA and the like), techniques herein may be performed in a physical storage system including one or more emulated or virtualized components (e.g., emulated or virtualized ports, emulated or virtualized BEs or FAs), and also a virtualized or emulated storage system including virtualized or emulated components. For example, in embodiments in which NVMe technology is used to communicate with, and transfer data between, a host system and one or more FAs, one or more of the FAs may be implemented using NVMe technology as an emulation of an FC adapter.

Storage system 20 a may include a back-up power supply 41 (e.g., a battery) that can provide power to the storage system for a limited amount of time to after primary (AC) power fails. This limited time may allow certain tasks to be performed during a window time beginning when the primary power fails until the earliest of: the primary power is restored; and the end of the limited lifetime (sometimes on the order of second or tens of seconds) of the back-up power supply. For example, during this window of time, the contents of the cache 28 may be de-staged to one or more physical storage devices.

Any of storage systems 20 a-n, or one or more components thereof, described in relation to FIGS. 1-2 may be implemented using one or more Symmetrix®, VMAX®, VMAX3® or PowerMax™ systems made available from Dell EMC.

Host systems 14 a-n may provide data and control (e.g., management and access control) information to storage systems 20 a-n over a plurality of IO paths defined between the host systems and storage systems, for example, including host system components, storage system components, and network components (e.g., of network 18), and the storage systems also may provide data to the host systems across the IO paths. In the embodiment of FIG. 1, the host systems may not address the physical storage devices (e.g., disk drives or flash drives) 24 of the storage systems directly, but rather access to data may be provided to one or more host systems from what the host systems view as a plurality of logical storage units (LSUs) including, for example, a logical volume, logical block, LUN (i.e., logical device or logical disk), thin device, groups of logical devices (e.g., storage group), NVMe namespace, and other types of LSUs. For example, a PowerMax storage system may be configured to organize available storage resources (e.g., physical storage devices) into many LUNs, each with its own addressable space defined in logical blocks addresses (LBAs). The LSUs may or may not correspond to the actual physical storage devices. For example, one or more LSUs may map to a single physical storage device; that is, the logical address space of the one or more LSU may map to physical space on a single physical storage device. Data in a single storage system may be accessed by multiple hosts allowing the hosts to share the data residing therein. The FAs may be used in connection with communications between a storage system and a host system. The RAs may be used in facilitating communications between two storage systems. The BEs may be used in connection with facilitating communications to the associated physical storage device(s) based on LSU(s) mapped thereto.

FIG. 2 is a block diagram illustrating an example of at least a portion 211 of a storage system (e.g., 20 a) including multiple boards 212 a-212 n. Storage system 211 may include a plurality of boards 212 a-212 n and a fabric 230 (e.g., internal fabric 30) over which the boards 212 a-n may communicate. Each of the boards 212 a-212 n may include components thereon as illustrated. The fabric 230 may include, for example, one or more switches and connections between the switch(es) and boards 212 a-212 n. In at least one embodiment, the fabric 230 may be an IB fabric.

In the following paragraphs, further details are described with reference to board 212 a but each of the N boards in a system may be similarly configured. For example, board 212 a may include one or more directors 216 a (e.g., directors 37 a-n) and memory portion 214 a. The one or more directors 216 a may include one or more processing cores 217 a including compute resources, for example, one or more CPUs cores and/or a CPU complex for processing IO operations, and be configured to function as one of the directors 37 a-n described herein. For example, element 216 a of board 212 a may be configured to operate, such as by executing code, as any one or more of an FA, BE, RA, and the like.

Each of the boards 212 a-n may include one or more host channel adapters (HCAs) 215 a-n, respectively, that physically couple, and are configured to enable communication between, the boards 212 a-n, respectively, and the fabric 230. In some embodiments, the fabric 230 may include multiple (e.g., 2) switches, and each HCA 215 a-n may have multiple (e.g., 2) ports, each one connected directly to one of the switches.

Each of the boards 212 a-n may, respectively, also include memory portions 214 a-n. The memory portion of each board may be characterized as locally accessible with respect to that particular board and with respect to other components on the same board. For example, board 212 a includes memory portion 214 a which is memory that is local to that particular board 212 a. Data stored in memory portion 214 a may be directly accessed by a CPU or core of a director 216 a of board 212 a. For example, memory portion 214 a may be a fast memory (e.g., DIMM (dual inline memory module) DRAM (dynamic random access memory)) that is locally accessible by a director 216 a where data from one location in 214 a may be copied to another location in 214 a directly using DMA operations (e.g., local memory copy operations) issued by director 216 a. Thus, the director 216 a may directly access data of 214 a locally without communicating over the fabric 230.

The memory portions 214 a-214 n of boards 212 a-n may be further partitioned into different portions or segments for different uses. For example, each of the memory portions 214 a-214 n may respectively include GM segments 220 a-n configured for collective use as segments of a distributed GM. Thus, data stored in any GM segment 220 a-n may be accessed by any director 216 a-n on any board 212 a-n. Additionally, each of the memory portions 214 a-n may respectively include board local segments 222 a-n. Each of the board local segments 222 a-n are respectively configured for use locally by the one or more directors 216 a-n, and possibly other components, residing on the same single board. In at least one embodiment where there is a single director denoted by 216 a (and generally by each of 216 a-n), data stored in the board local segment 222 a may be accessed by the respective single director 216 a located on the same board 212 a. However, the remaining directors located on other ones of the N boards may not access data stored in the board local segment 222 a.

To further illustrate, GM segment 220 a may include information such as user data stored in the data cache, metadata, and the like, that is accessed (e.g., for read and/or write) generally by any director of any of the boards 212 a-n. Thus, for example, any director 216 a-n of any of the boards 212 a-n may communicate over the fabric 230 to access data in GM segment 220 a. In a similar manner, any director 216 a-n of any of the boards 212 a-n may generally communicate over fabric 230 to access any GM segment 220 a-n comprising the GM. Although a particular GM segment, such as 220 a, may be locally accessible to directors on one particular board, such as 212 a, any director of any of the boards 212 a-n may generally access the GM segment 220 a. Additionally, the director 216 a may also use the fabric 230 for data transfers to and/or from GM segment 220 a even though 220 a is locally accessible to director 216 a (without having to use the fabric 230).

Also, to further illustrate, board local segment 222 a may be a segment of the memory portion 214 a on board 212 a configured for board-local use solely by components on the single/same board 212 a. For example, board local segment 222 a may include data described in following paragraphs which is used and accessed only by directors 216 a included on the same board 212 a as the board local segment 222 a. In at least one embodiment in accordance with techniques herein and as described elsewhere herein, each of the board local segments 222 a-n may include a local page table or page directory used, respectively, by only director(s) 216 a-n local to each of the boards 212 a-n.

In such an embodiment as in FIG. 2, the GM segments 220 a-n may be logically concatenated or viewed in the aggregate as forming one contiguous GM logical address space of a distributed GM. In at least one embodiment, the distributed GM formed by GM segments 220 a-n may include the data cache, various metadata and/or structures, and other information, as described in more detail elsewhere herein. Consistent with discussion herein, the data cache, having cache slots allocated from GM segments 220 a-n, may be used to store IO data (e.g., for servicing read and write operations).

In an embodiment, the storage system as described may be characterized as having one or more logical mapping layers in which an LSU of the storage system is exposed to the host whereby the LSU is mapped by such mapping layers of the storage system to one or more physical storage devices. Additionally, the host also may have one or more additional mapping layers so that, for example, a host-side LSU may be mapped to one or more storage system LSUs as presented to the host.

Any of a variety of data structures may be used to process IO on storage system 20 a, including data structures to manage the mapping of LSUs and locations thereon to physical storage devices and locations thereon. Such data structures may be stored in any of memory 26, including GM 25 b and memory 25 a, GM segment 220 a-n and/or board local segments 22 a-n. Thus, storage system 20 a, and storage system 620 a described in more detail elsewhere herein, may include memory elements (e.g., cache) that hold data stored on physical storage devices or that is currently held (“staged”) and will be stored (“de-staged”) to physical storage devices, and memory elements that store metadata (e.g., any of the metadata described herein) associated with such data. Illustrative examples of data structures for holding such metadata will now be described.

FIG. 3A is a block diagram illustrating an example of tables 60 defining relationships between LSUs and physical storage devices on a data storage system, according to embodiments of the invention. A first table 62 corresponds to the LSUs (e.g., logical deices) used by a storage system (e.g., storage system 20 a) or by an element of a storage system, such as an FA and/or a BE, and may be referred to herein as a “master LSU table.” The master LSU table 62 may include a plurality of LSU entries 66-68, each entry representing an LSU used by the storage system. The entries in the master LSU table 62 may include descriptions for any type of LSU described herein.

Each of the entries 66-68 of the master LSU table 62 may correspond to, and include a reference to, another table corresponding to the LSU represented by the respective entry. For example, the entry 67 may reference a table 72, referred to herein as an “LSU table,” corresponding to the LSU represented by the entry 67. The LSU table 72 may include a header that contains information pertinent to the LSU as a whole. The LSU table 72 also may include entries 76-78 for separate contiguous logical data portions of the represented LSU; each such logical data portion corresponding to, and including a reference to, one or more contiguous physical locations (e.g., logical block address ranges) of a physical storage device (e.g., a cylinder and/or a group of tracks). In an embodiment disclosed herein, an LSU may contain any number of logical data portions depending upon how the LSU is initialized. However, in other embodiments, an LSU may contain a fixed number of logical data portions.

Each of the logical data portion entries 76-78 may correspond to a track table. For example, the entry 77 may correspond to a track table (or “LSU track table”) 82, which includes a header 84. The LSU track table 82 also includes entries 86-88, each entry representing an LSU track of the entry 77. In an embodiment disclosed herein, there are fifteen tracks for each contiguous logical data portion. However, for other embodiments, it may be possible to have different numbers of tracks for each of the logical data portions or even a variable number of tracks for each logical data portion. The information in each of the LSU track entries 86-88 may include a pointer (either direct or indirect—e.g., through another data structure) to a physical address of a physical storage device, for example, any of physical storage devices 24 of the storage system 20 a (or a remote storage system if the system is so configured).

In addition to physical storage device addresses, or as an alternative thereto, each of the LSU track entries 86-88 may include a pointer (either direct or indirect—e.g., through another data structure) to one or more cache slots of a cache in the GM if the data of the logical track is currently in cache. For example, an LSU track entry 86-88 may point to one or more entries of cache slot table 500, described in more detail elsewhere herein. Thus, the LSU track table 82 may be used to map logical addresses of an LSU corresponding to the tables 62, 72, 82 to physical addresses within physical storage devices of a storage system and/or to cache slots within a cache.

In some embodiments, each entry 86-88 may specify a version of the data stored on the track, as described in more detail elsewhere herein.

FIG. 3B is a diagram illustrating an example of a table 72′ used for a thin logical device (i.e., a thin LSU), which may include null pointers as well as entries similar to entries for the LSU table 72, discussed above, that point to a plurality of LSU track tables 82 a-82 e. Table 72′ may be referred to herein as a “thin device table.” A thin logical device may be allocated by the system to show a particular storage capacity while having a smaller amount of physical storage that is actually allocated. When a thin logical device is initialized, all (or at least most) of the entries in the thin device table 72′ may be set to null. Physical data may be allocated for particular sections as data is written to the particular logical data portion. If no data is written to a logical data portion, the corresponding entry in the thin device table 72′ for the data portion maintains the null pointer that was written at initialization.

FIG. 3C is a block diagram illustrating an example of a data structure 500 for mapping LSU tracks (e.g., thin device tracks) to cache slots of a cache. Data structure 500 may be referred to herein as a “cache slot table.” Cache slot table 500 may include a plurality of entries (i.e., rows) 502, each row representing an LSU track (e.g., any of LSU tracks 86-88 in track table 82) identified by an LSU ID in column 504 and an LSU track ID (e.g., number) identified in column 506. For each entry of cache slot table 500, column 512 may specify a cache location in a cache corresponding to the logical storage device track specified by columns 504 and 506. A combination of an LSU identifier and LSU track identifier may be used to determine from columns 504 and 506 whether the data of the identified LSU track currently resides in any cache slot identified in column 512. Through use of information from any of tables 62, 72, 72′ and 82 described in more detail elsewhere herein, the one or more LSU tracks of an LSU specified in an IO operation can be mapped to one or more cache slots. Further, using the same data structures, the one or more physical address ranges corresponding to the one or more LSU tracks of the LSU may be mapped to one or more cache slots.

The tables 62, 72, 72′, 82 and 500 of FIGS. 3A-3C may be stored in the GM 26 of the storage system 20 a during operation thereof and may otherwise be stored in non-volatile memory (i.e., with the corresponding physical storage device). In addition, tables corresponding to LSUs accessed by a particular host may be stored in local memory of the corresponding one of the FAs 21 a-n. In addition, RA 40 and/or the BEs 23 a-n may also use and locally store portions of the tables 62, 72, 72′, 82 and 500. Other data structures may be stored in any of GM 25 b, memory 25 a, GM segment 220 a-n and/or board local segments 22 a-n.

FIG. 4 is a block diagram illustrating an example of a system 100 including a host system 102 communicatively coupled to a data storage system 120 via multiple IO paths, according to embodiments of the invention. Other embodiments of system including a host system communicatively coupled to a data storage system via multiple IO paths, for example, variations of system 100, are possible and are intended to fall within the scope of the invention. The system 100 may be implemented using one or more components of the system 10, for example, one or more storage systems 20 a-n and/or one or more hosts 14 a-14 n, or variation thereof.

The system 100 may include a host system 102, switch 140 and data storage system 120. The host system 102 and data storage system 120 may communicate over one or more IO paths through the switch 140. Elements 110 a-110 c denote connections between the host system 102 and switch 140. Element 112 a-112 c denote connections between the data storage system 120 and the switch 140. Element 130 may represent a physical storage device of the data storage system 120, such as a rotating disk drive, flash-based or other solid state storage device, or the like, where the physical storage physical storage device 130 may be configured to include three LSUs—LUN5, LUN6 and LUN10. It should be noted that in the illustrative embodiment of FIG. 4, the system 100 includes only a single host system 102, single physical storage device 130 with 3 LSUs, a single data storage system 120, and a single switch for purposes of simplicity to illustrate the techniques herein. For example, each of the LSUs may be configured to have storage provisioned from multiple different physical storage devices rather than a single physical storage device, and multiple host systems having multiple applications executing thereon may communicate with the data storage system.

It should be appreciated that the descriptions provided in the following paragraphs may refer to particular examples using the switch 140 having a switching fabric for simplicity of illustration. Element 140 may be a single switch having a switching fabric, or a multi-switch having a multi-switch fabric and the like. Thus, element 140 may more generally denote a network having its own connectivity fabric or network fabric where the network may include one or more components providing the connectivity between the host system 102 and data storage system 120.

The host system 102 may be implemented as a server, and may include an application 104, a multi-path (MP) driver 106 and other components 108 such as, for example, one or more other device drivers and other code. An IO request (specifying an IO operation) from the application 104 may be communicated to the data storage system 120 using the MP driver 106 and one or more other components 108. The application 104 may be a database or other application which issues data operations, such as IO operations, to the data storage system 120. Each of the IO operations may be directed to a target device, such as one of the LSUs of physical storage device 130, configured to be accessible to the host system 102 over multiple IO paths. As such, each of the IO operations may be forwarded from the application 104 to the data storage system 120 over one of the possible multiple IO paths.

The MP driver 106 may include functionality to perform any one or more different types of processing such as related to encryption, multi-pathing, mirroring, migration, and the like. For example, the MP driver 106 may include multi-pathing functionality for management and use of multiple IO paths. For example, the MP driver 106 may perform IO path selection to select one of the possible multiple IO paths based on one or more criteria such as load balancing to distribute IO requests for the target device across available active IO paths. Load balancing may be performed to provide for better resource utilization and increased performance of the host system, data storage system, and network or other connection infrastructure. The MP driver 106 may be included in a commercially available product such as, for example, Dell EMC PowerPath® software made available by Dell EMC. Other components 108 of the host system 102 may include one or more other layers of software used in connection with communicating the IO operation from the host system to the data storage system 120 such as, for example, Fibre Channel (FC) or SCSI drivers, a logical volume manager (LVM), or the like. The other components 108 may include software or other components used when sending an IO operation from the application 104 to the data storage system 120, where such components may include those invoked in a call stack above and/or below the MP driver 106. For example, application 104 may issue an IO operation which is communicated via a call stack including an LVM, the MP driver 106, and an FC or SCSI driver, e.g., as described elsewhere herein in more detail.

The data storage system 120 may include one or more physical storage devices, such as physical storage device 130, where each such physical storage device may be configured to store data of one or more LSUs. Each of the LSUs having data stored on the physical storage device 130 may be configured to be accessible to the host system 102 through one or more IO paths. For example, all LSUs of physical storage device 130 may be accessible using ports of the three FEs 122 a-122 c, also denoted respectively as host adapters HA1, HA2 and HA3. The multiple IO paths allow the application IOs to be routed over multiple IO paths and, more generally, allow the LSUs of physical storage device 130 to be accessed over multiple IO paths. In the event that there is a component failure in one of the multiple IO paths, IO requests from applications can be routed over other alternate IO paths unaffected by the component failure. The MP driver 106 may be configured to perform load balancing in connection with IO path selection, as well as other processing. The MP driver 106 may be aware of, and may monitor, all IO paths between the host system and the LSUs of the physical storage device 130 in order to determine which of the multiple IO paths are active or available at a point in time, which of the multiple IO paths are unavailable for communications, and to use such information to select an IO path for host system-data storage system communications.

In the example of the system 100, each of the LSUs of the physical storage device 130 may be configured to be accessible through three IO paths. Each IO path may be represented by two path endpoints having a first endpoint on the host system 102 and a second endpoint on the data storage system 120. The first endpoint may correspond to a port of a host system component, such as a host bus adapter (HBA) of the host system 102, and the second endpoint may correspond to a port of a data storage system component, such as a port of an HA of the data storage system 120. In the example of the system 100, elements A1, A2 and A3 each denote a port of a host system 102 (e.g., a port of an HBA), and elements B1, B2 and B3 each denote a port of an HA of the data storage system 120. Each of the LSUs of the physical storage device 130 may be accessible over three IO paths—a first IO path represented by A1-B1, a second IO path represented by A2-B2 and a third IO path represented by A3-B3.

FIG. 5 is a block diagram illustrating an example of a plurality of logical layers 150 of a combination of a host system (e.g., the host system 102 of FIG. 3) and a data storage system (e.g., the data storage system 120) for processing an IO request, according to embodiments of the invention. Other embodiments of a plurality of logical layers of a combination of a host system and a data storage system for processing an IO request, for example, variations of logical layers 150, are possible and are intended to fall within the scope of the invention. FIG. 5 provides further detail regarding various software layers that may be used in connection with the MP driver 106 of FIG. 4. The various software layers of 150 may generally form layers included in the runtime IO stack, such as when an IO request is issued by an application on a host system to a data storage system. The system includes an application layer 121 which includes application programs executing on the host system computer 102. The application layer 121 may refer to storage locations using an associated label or identifier such as a file name or file identifier. Below the application layer 121 is the file system layer 123 and the LVM layer 125 a that maps the label or identifier specified by the application layer 121 to an LSU which the host system may perceive as corresponding to a physical storage device address (e.g., the address of one of the disk drives) within the storage system. Below the LVM layer 125 a may be the MP (multi-path) driver 106 which handles processing of the IO received from layer 125 a. The MP driver 106 may include a base driver and one or more driver extension modules. The MP driver 106 may be implemented using a commercially available product such as Dell EMC PowerPath software.

Functionality for performing multi-pathing operations, such as may be performed by Dell EMC PowerPath software, may be included in one of the driver extension modules such as a multi-path extension module. As described above, the MP driver may perform processing in connection with multiple IO path management and selecting one of a plurality of possible IO paths for use in connection with processing IO operations and communicating with the data storage system, such as data storage system 120 of FIG. 4. More generally, one or more layers between the application layer 121 and the MP driver 106, for example, the file system 123, may provide for mapping an LSU (such as used in connection with block-based storage), presented by the data storage system to the host system, to another logical data storage entity, such as a file, that may be used by the application layer 121. Below the MP driver 106 may be the SCSI driver 125 b and a hardware (HW) driver 125 c. The SCSI driver 125 b may handle processing of a received IO request from the MP driver 106 such as related to forming a request in accordance with one or more SCSI standards. The driver 125 c may be a hardware driver that facilitates communication with hardware on the host system. The driver 125 c may be, for example, a driver for an HBA of the host system which sends commands or requests to the data storage system and also receives responses and other communications from the data storage system. It should be appreciated that, in some embodiments, the ordering of the MP driver 106 and SCSI driver 125 b may be reversed. That is, in some cases, the MP driver 106 sits below the SCSI driver 126 b.

In some embodiments, layers 121-125 c are implemented on a host (e.g., the host system 102) coupled to a data storage system (e.g., the data storage system 120) that is an intelligent data storage system having its own mapping layer 127 such that the LSU known or exposed to the host system may not directly correspond to a physical storage device such as a disk drive. In such embodiments, the LSU specified by the host system in the IO operation may be further mapped by the data storage system using its mapping layer 127. For example, an LSU specified by the host system may be mapped by the data storage system to one or more physical drives, and multiple LSUs may be located on a same physical storage device, multiple physical drives, and the like.

The MP driver 106, as well as other components illustrated in FIG. 5, may execute in a kernel mode or another privileged execution mode. In some embodiments using a Unix-based OS, the MP driver 106 may be executed in kernel mode, whereas an application such as represented by application layer 121 may typically execute in user mode, or more generally, a non-privileged execution mode. It should be appreciated that embodiments of the invention may be implemented using any of a variety of different suitable OSs including a Unix-based OS, a Linux-based system, any one of the Microsoft Windows® OSs, or other OSs. Additionally, the host system may provide a virtualized environment and may execute, for example, VMware ESX® or VMware ESXi™ software providing bare-metal embedded hypervisors.

In operation, an application executing at application layer 121 may issue one or more IO requests specifying IO operations (e.g., read and write operations) to logical volumes (implemented by the LVM 125 a) or files (implemented using the file system 123), whereby such IO requests may be mapped to IO communications (specifying the IO operation) directed to LSUs of the data storage system. Such IO operations from the application layer 121 may be directed to the MP driver 106 after passing through any intervening layers such as, for example, the layers 123 and 125 a. Communications between an initiator port of the host system and a target port of a data storage system (e.g., target port of an HA) may include those related to IO operations and other non-IO commands such as related to host system control operations. IO operations may include, for example, read and write operations with respect to data stored on an LSU.

In connection with the SCSI standard, an IO path may be defined between an initiator port of the host system and a target port of the data storage system. An IO request may be sent from the host system (e.g., from a component thereof such as an HBA), which may be referred to as an initiator, originator or source with respect to the foregoing IO path. The host system, as the initiator, sends IO requests along the IO path to a data storage system (e.g., a particular component thereof such as an HA having a port with a network address), which may be referred to as a target, destination, receiver, or responder. Each physical connection of an IO path may be between a first endpoint which is a port of the host system (e.g., such as an HBA having ports such as denoted as A1-A3 of FIG. 4) and a second endpoint which is a port of an HA (e.g., such as B1-B3 of FIG. 4) in the data storage system. Through each such IO path, one or more LSUs may be visible or exposed to the host system initiator through the target port of the data storage system.

In some embodiments of the invention, a host system is directly connected to an internal fabric of a storage system; i.e., the host is connected to the internal fabric without an intervening director (e.g., FA) or other component of the storage system controlling the host system's access to the internal fabric. For example, rather than a host system (e.g., host 14 a) being physically coupled to a network (e.g., network 18), which is coupled to an FA (e.g., host adapter 21 a), which is coupled to an internal fabric (e.g., internal fabric 30) of a storage system (e.g., storage system 20 a), where the FA controls the host system's access to other components (e.g., GM 25 b, other directors 37 a-n) of the storage system over the internal fabric as illustrated in FIG. 1, the host system may be directly connected to the internal fabric, and communicate with other components of the storage system over the internal fabric independently of any FA or external network. In some embodiments, the host system may communicate with physical storage devices and/or GM over an IO path that does not include any directors (e.g., FAs or BEs), for example, over the internal fabric to which the host system is directly attached. In embodiments in which at least a portion of the GM is considered part of a director, the host system may be configured to communicate with such GM directly; i.e., over the internal fabric and without use of director compute resources (e.g., a CPU core and/or CPU complex).

In some embodiments, the GM may include persistent memory for which data stored thereon (including state information) persists (i.e., remains available) after the process or program that created the data terminates, perhaps even after the storage system fails (for at least some period of time). In some embodiments, the internal fabric exhibits low latency (e.g., when IB is employed). In such embodiments, by enabling a host system to directly access GM of the storage system, which may include persistent memory, host systems may be configured to expand their memory capacity, including persistent memory capacity by using the memory of the storage system. Thus, a system administrator could expand the memory capacity, including persistent memory capacity of the hosts of a storage network without having to purchase, deploy and configure new host systems. Rather, the system administrator may configure existing host systems to utilize the GM of the storage system, and/or purchase, install and configure one or more storage system interfaces (SSIs; described elsewhere herein in more detail) on existing host systems, which may result in significant savings in time and cost. Further, because of the security advantages provided by the SSI described in more detail elsewhere herein, use of the GM may prove more secure than memory, including persistent memory, added to host systems to expand memory capacity.

In some embodiments, an SSI located externally to the storage system may be provided that serves as an interface between the host system and storage system. The SSI may be part of the host system, and in some embodiments may be a separate and discrete component from the remainder of the host system, physically connected to the remainder of the host system by one or more buses that connect peripheral devices to the remainder of the host system. The SSI may be physically connected directly to the internal fabric. In some embodiments, the SSI may be implemented on a card or chipset physically connected to the remainder of a host system by a PCIe interconnect.

A potential benefit of implementing an SSI as a physically separate and discrete component from the remainder of a host system is that the SSI's resources may be configured such that its resources are not available for any functions, tasks, processing or the like on the host system other than for authorized IO processing. Thus, IO performance may be improved and more deterministic, as SSI resources may not be depleted for non-IO-related tasks on the host system. Further, as a physically separate and discrete component from the remainder of the host system, the SSI may not be subject to the same faults as the remainder of the system, i.e., it may be in a different fault zone from the remainder of the host system.

The SSI may provide functionality traditionally provided on storage systems, enabling at least some IO processing to be offloaded from storage systems to SSIs, for example, on host systems. Metadata about the data stored on the storage system may be stored on the SSI, including any metadata described herein. The SSI may be configured to determine whether an IO operation is a read or write operation, and process the IO operation accordingly. If the IO operation is a read operation, the SSI may be configured to determine from metadata whether the data to be read is in cache on the storage system. If the data is in cache, the SSI may read the data directly from cache over the internal fabric without use of CPU resources of a director, and, in some embodiments, without use of a director at all. If the data is not in cache, the SSI may determine, from the metadata, the physical storage device and physical location (e.g., address range) therein of the data to be read. The data then may be read from the physical storage device over the internal fabric without use of a director. Data may be read from a cache or physical storage device to the SSI using RDMA communications that do not involve use of any CPU resources on the storage system, SSI or the host system (e.g., other parts thereof), thereby preserving CPU resources on the storage network.

The IO processing capabilities of an SSI may be used to offload IO processing from a storage system, thereby reducing consumption of IO compute resources on the storage system itself. The overall storage compute capacity of a storage network may be increased without having to upgrade or add a storage system.

In some embodiments, an SSI may implement one or more technology specifications and/or protocols, including but not limited to, NVMe, NVMeoF and IB. For example, SSI may be configured to exchange IO communications with the remainder of the host system in accordance with NVMe. In embodiments in which an SSI is configured to communicate in accordance with NVMe, as opposed to in accordance with a native platform (including an OS or virtualization platform) of the host system, significant development and quality assurance costs may be realized, as developing or upgrading an SSI for each new or updated native platform may be avoided. Rather, the native platform may conform to NVMe, an industry standard, and support an OS-native inbox NVMe driver.

In some embodiments, secure access to data on a storage system via direct connection to an internal fabric may be provided. An SSI may validate each IO communication originating on the host system before allowing a corresponding IO communication to be transmitted on the internal fabric. The validation may include applying predefined rules and/or ensuring that the IO communication conforms to one or more technologies, e.g., NVMe. Additional security measures may include requiring validation of any SSI software or firmware before loading it onto the SSI, for example, using digital signatures, digital certificates and/or other cryptographic schemes, to ensure unauthorized code is not loaded onto the SSI that could enable unauthorized IO activity on a storage system. Further, in some embodiments, the SSI may be configured to encrypt IO communications originating on a host system and to decrypt IO communications received from the storage system, for example, in embodiments in which data is encrypted in flight between the host system to physical storage devices, and data may be encrypted at rest in memory of the storage system and/or on physical storage devices.

In addition, data integrity (e.g., checksums) in accordance with one or more technologies (e.g., T10DIF) may be employed by the SSI on IO communications exchanged between host systems and data storage systems, by which end-to-end data integrity between a host system and physical storage devices may be implemented, as described in more detail herein.

In some embodiments, in addition to an SSI communicatively coupled between a host operating system and an internal fabric of a storage system, a storage network may include an interface communicatively coupled between an internal fabric and a DAE that encloses a plurality of physical storage devices; i.e., a fabric-DAE interface (“FDI”). The FDI may be configured to employ any of a plurality of technologies, including NVMe, NVMeoF and IB, as described in more detail herein. In such embodiments, IO communications configured in accordance with NVMe may be implemented end-to-end from a host system to physical storage device, as described in more detail herein.

As described in more detail herein, through an SSI, a host system may exchange IO communications, including control information (e.g., commands) and data, with GM including cache along an IO path including internal fabric without use of compute resources of any of directors. Further, through an SSI, a host system may exchange IO communications, including control information (e.g., commands) and data, with physical storage devices along an IO path including internal fabric and not including use of directors. Thus, an IO path in a known storage network, which may include an HBA, an external network, an FA, an internal fabric, a BE, a PCI switch and a physical storage device, may be replaced with an IO path in accordance with embodiments of the invention, which includes an SSI, an internal fabric, an FDI and a physical storage device. These new IO paths, eliminating use of external networks and director compute resources (or directors altogether) may produce reduced response times for certain IO operations, as described in more detail elsewhere herein.

By removing an external network from the JO path between a host system and a storage system, and routing JO requests (e.g., all JO requests on a storage network) through one or more SSIs, the possible sources of malicious actions or human error can be reduced; i.e., the attack surface of a storage system can be reduced. Further, by implementing validation logic as described in more detail herein, in particular as close as possible (logically) to where an SSI interfaces with a remainder of a host system (e.g., as close as possible to physical connections to peripheral device interconnects), for example, within an NVMe controller, the storage system may be made more secure than known storage networks having JO paths including external networks. To further reduce access to an SSI, an NVMe driver may be configured as the only interface of an SSI made visible and accessible to applications on a host system. Any other interfaces to an SSI, for example, required for administration, may be made accessible only through certain privileged accounts, which may be protected using security credentials (e.g., encryption keys).

It should be appreciated that, although embodiments of the invention described herein are described in connection with use of NVMe, NVMeoF and IB technologies, the invention is not so limited. Other technologies for exchanging IO communications, for example, on an internal fabric of a storage system, may be used.

FIG. 6 is a block diagram illustrating an example of a storage network 600 including one or more host systems 614 a-n directly connected to an internal fabric 630 of a storage system 620 a, according to embodiments of the invention. Other embodiments of a storage network including one or more host systems directly connected to an internal fabric of a storage system, for example, variations of system 600, are possible and are intended to fall within the scope of the invention.

Storage network 600 may include any of: one or more host systems 14 a-n (described in more detail elsewhere herein); network 18 (described in more detail elsewhere herein); one or more host systems 614 a-n; one or more storage systems 620 a-n; and other components. Storage system 620 a may include any of: GM 640 (e.g., any of 25 b, 220 a-n and/or 220); one or more directors 637 (e.g., 37 a-n); a plurality of physical storage devices 624 (e.g., 24), which may be enclosed in a disk array enclosure 627 (e.g., 27); internal fabric 630 (e.g., internal fabric 30); FDI 606, other components; or any suitable combination of the foregoing. Internal fabric 630 may include one or more switches and may be configured in accordance with one or more technologies, for example, IB. In some embodiments, at least a portion of GM 640, including at least a portion of cache 642, may reside on one or more circuit boards on which one of the directors 637 also resides, for example, in manner similar to (or the same as) boards 212 a-n described in relation to FIG. 2. In such embodiments, a director 637 may be considered to include at least a portion of GM 640, including at least a portion of cache 642 in some embodiments. FDI 606 may be configured to manage the exchange of IO communications between host system 614 a-n directly connected to internal fabric 630 and physical storage devices 624 (e.g., within DAE 627), as described in more detail elsewhere herein.

Each of host systems 614 a-n may include SSI 616 connected directly to internal fabric 630 and configured to communicate with GM 640 and physical storage devices 624 (e.g., via FDI 606) over the internal fabric 630 independently of any of the directors 637 or any external network, for example, network 18. In embodiments in which one or more directors 637 may be considered to include at least a portion of GM 640, including at least a portion of cache 642 in some embodiments, SSI 616 may be configured to communicate with such GM 640, including cache 642, directly without use of any compute resources (e.g., of a CPU core and/or CPU complex) of any director 637. For example, SSI 616 may be configured to use RDMA as described in more detail herein. Thus, embodiments of the invention in which a host system, or more particularly an SSI, communicates directly with a GM or cache of a storage system include: the host system communicating with a portion of GM or cache not included in a director independently of any director; and/or the host system communicating with a portion of GM or cache included in a director independently of any compute resources of any director. In both cases, communicating directly with a GM or cache of a storage system does not involve use of any compute resources of the director.

The GM 640 may include persistent memory for which data stored thereon persists after the process or program that created the data terminates. For example, at least portions of GM may be implemented using DIMM (or another type of fast RAM memory) that is battery-backed by a NAND-type memory (e.g., flash). In some embodiments, the data in such persistent memory may persist (for at least some period of time) after the storage system fails.

As illustrated in FIG. 6, each of host systems 614 a-n may be connected to any of storage system 620 a-n through network 18, for example, through an HBA on the host. While not illustrated in FIG. 6, one or more of SSIs 616 may be connected to one or more other storage systems of storage systems 620 a-n. It should be appreciated that any of hosts 614 a-n may have both: one or more HBAs for communicating with storage systems 620 a-n over network 18 (or other networks); and one or more SSIs 616 connected directly to an internal fabric of one or more storage systems 620 a-n and configured to communicate with GM and physical storage devices over the internal fabric independently of any directors or external network.

One or more of the directors 637 may serve as BEs (e.g., BEs 23 a-n) and/or FAs (e.g., host adapter 21 a-n), and enable IO communications between the storage system 620 a and hosts 14 a-n and/or 614 a-n over network 18, for example, as described in relation to FIG. 1. Thus, a storage system 620 a may concurrently provide host access to physical storage devices 624 through: direct connections to internal fabric 630; and connections via network 18 and one or more directors 637.

SSI 616 may be implemented as SSI 716 described in relation to FIG. 7. FIG. 7 is a block diagram illustrating an example of an SSI 716 of a host system 700 directly connected to an internal fabric 630 of a storage system, according to embodiments of the invention. Other embodiments of an SSI of a host system directly connected to an internal fabric of a storage system, for example, variations of SSI 716, are possible and are intended to fall within the scope of the invention.

Host system 700 (e.g., one of host systems 614 a-n) may include any of: operating system (OS) 701; an SSI 716 (e.g., SSI 616); one or more peripheral device interconnects 703; other components; and any suitable combination of the foregoing. Host OS 701 may be configured to execute applications running on the host system, which may result in IO operations for data stored on any of storage systems 620 a-n, requiring IO communications to be exchanged between the host system and the one or more storage systems 620 a-n. Host OS 701 may be any suitable operating system for processing IO operations, for example, a version of Linux, or a hypervisor or kernel of a virtualization platform, for example, a version of VMware ESXi™ software available from VMware, Inc. of Palo Alto, Calif. Other operating systems and virtualization platforms that support an NVMe driver may be used.

In some embodiments, SSI 716 may be physically separate and discrete from the remainder of host system 700, the remainder including the OS 701 of the host system and the hardware and firmware on which the OS 701 executes, and SSI 716 may be pluggable into host system 700, which may be physically configured to receive SSI 716. In such embodiments, the SSI 716 may be considered a first physical part of the host system, for example, a peripheral component or device of the host system, and the remainder of the host system may be considered a second physical part of the host system. For example, SSI 716 may be configured to physically connect to the other part of the host system 700 by the one or more peripheral device interconnects 703, which may be configured in accordance with one or more technologies (e.g., PCIe, GenZ, another interconnect technology, or any suitable combination of the foregoing). An interconnect configured to connect to, and enable communications with, a peripheral component or device may be referred to herein as a “peripheral device interconnect,” and a peripheral device interconnect configured in accordance with PCIe referred to herein as a “PCIe interconnect.” SSI 716 may be implemented on a card or chipset, for example, in the form of a network interface controller (NIC), which may be configured with additional logic as described herein such that the resulting device may be considered a smart NIC (“SmartNIC”). As is described in more detail herein, SSI 716 may include an operating system for executing one or more IO-related functions. Thus, in some embodiments, a first one or more operating systems (e.g., host OS 701) may be executing applications (e.g., on first part of the host 700) that result in IO operations, while SSI 716 includes one or more second operating systems for performing functions and tasks on SSI 716 in relation to processing such IO operations, such functions and tasks described in more detail elsewhere herein.

In some embodiments, SSI 716 may be configured to communicate according to a PCIe specification over one or more peripheral device interconnects 703, and SSI 716 may be configured to communicate according to an NVMe specification such that the SSI 716 presents itself as one or more NVMe devices (e.g., drives) to the host system 700. For example, the host interface 706 may include an NVMe controller 708 configured to exchange IO communication according to NVMe with NVMe queues within an NVMe driver 702 of OS 701. That is, the OS 701 of the host system 700 may include an NVMe driver 702 configured to exchange IO communications with the NVMe controller 708 in accordance with NVMe. To this end, the NVMe driver 702 may include at least two IO queues, including one or more submission queues (SQs) 704 a for submitting commands via a peripheral device interconnect 703 (configured as a PCIe interconnect) to NVMe controller 708, and may have one or more completion queues (CQs) 704 b for receiving completed commands from NVMe controller 708 via one or more interconnects 703. Each SQ may have a corresponding CQ, and, in some embodiments, multiple SQs may correspond to the same CQ. In some embodiments, there may be up to 64K IO queues in accordance with a version of the NVMe specification. The NVMe driver 702 also may include an admin SQ and CQ pair for control management in accordance with a version of the NVMe specification, and NVMe driver 702 and NVMe controller 708 may be configured to exchange control management communications with each other using admin SQs and CQs in accordance with a version of the NVMe specification.

SSI 716 may include any of: host interface 706; security logic 710; IO processing logic 717; storage metadata (MD) 722; storage system communication interface (SSCI) 729; registration logic 727; memory 723; other components; or any suitable combination of the foregoing.

Registration logic 727 may be configured to register host system 700 and/or SSI 716 with storage system 620 a when SSI 716 is connected to internal fabric 630, to enable future communication between the storage system 620 a and internal fabric 630.

Security logic 710 may include any of: IO validation logic 711; cryptographic logic 712; code validation logic 713; security credentials 714; other components; or any suitable combination of the foregoing. IO validation logic 711 may prevent any undesired (e.g., invalid) communications from being further processed by SSI 716 or storage system 620 a. Security logic 710, and more specifically IO validation logic 711, may be a first component of SSI 716 to act on a communication received on one of the peripheral device interconnects 703, to ensure that any undesired communications do not proceed any further within SSI 716 and storage system 620 a. To this end, it should be appreciated that one or more aspects of security logic 710, including IO validation logic 711 and code validation logic 713, or portions thereof, may be implemented as part of host interface 706, for example, as part of NVMe controller 708.

IO validation logic 711 may include logic that verifies that a communication received on one of peripheral device interconnects 703 is indeed an IO communication authorized to be transmitted on SSI 716. For example, IO validation logic 711 may be configured to ensure that a received communication is an IO communication properly configured in accordance with NVMe, and to reject (e.g., discard or drop) any received communications not properly configured. Further, IO validation logic 711 may be configured to allow only a certain subset of IO operations, for example, read or write operations, and reject other IO operations, for example, operations to configure storage and/or other storage management operations. Such stipulations may be captured as one or more user-defined rules that may be defined and stored (e.g., in a rules data structure) within SSI 716. It should be appreciated that rules may be specific to one or more storage-related entities, for example, users, groups of users, applications, storage devices, groups of storage devices, or other property values. Thus IO validation logic 711 may be configured to implement any of a variety of business rules to control access to resources on storage system 620 a.

Cryptographic logic 712 may be configured to encrypt data included in IO communications received from host OS 701 and before repackaging the data (in encrypted form) in IO communications transmitted over internal fabric 630 to components of storage system 620 a. Cryptographic logic 712 also may be configured to decrypt data from IO communications received from internal fabric 620 a before sending the unencrypted data in IO communication to host OS 701. Any of a variety of cryptographic schemes may be used, including use of symmetric and/or asymmetric keys, which may be shared or exchanged between SSI 716 of the host system, one of more storage systems 620 a-n, and one or more SSIs of other host systems 614 a-n, depending on what entities are entitled access to the data. For example, during a manufacturing and/or configuring of SSIs 716 and/or storage systems 620 a-n, one or more encryption keys and/or other secrets (collectively, “security credentials”) may be shared, to enable implementation of the given cryptographic scheme, and may be stored as part of security credentials 714.

In embodiments in which data is encrypted on SSI 716 before being transmitted to the storage system 620 a, the data may be stored in encrypted form in physical storage devices 624 and/or GM 640. In such embodiments, directors 637 and other components that may be authorized to access the encrypted data also may be configured to implement whatever cryptographic scheme is being employed, which may be desirable for host systems (e.g., host systems 14 a-n) that may access storage system 620 a by means other than an SSI as described herein. In some known storage systems, physical storage devices may be self-encrypting drives that encrypt data received from BEs, and then decrypt the data when it is retrieved for BEs. This may be considered a form of data-at-rest encryption. In embodiments of the invention in which data is encrypted on SSI 716, and transmitted to physical storage devices 624 in encrypted form to be stored, it may be desirable that physical storage devices 624 do not employ their own encryption, as the data will arrive encrypted. That is, encrypting the already-encrypted data would be redundant, and a waste of processing resources. Further, self-encrypting drives may be more expensive than drives not including this feature. Thus, if there is no need for physical storage devices 624 to encrypt and decrypt data, physical storage device not having self-encryption, but otherwise having the same or similar capabilities, may be acquired at reduced cost.

By encrypting data on a host system, e.g., as part of an SSI 716, data may not only be able to be encrypted while at rest, but also while in transit. That is, in embodiments of the invention, data may be encrypted in transit on an IO path from a host system to a physical storage device (i.e., end-to-end) as well as being encrypted at rest on a physical storage device or in memory (e.g., cache) of a storage system.

As described in more detail elsewhere herein, SSI 716 may be implemented in various combinations of hardware, software and firmware, including microcode. In some embodiments of SSI 716 implemented using software and/or firmware, the software and/or firmware, and updates thereto, may be subject to verification of digital signature before being allowed to be installed on SSI 716. For example, the security credentials 714 may include a public certificate that includes a cryptographic key (e.g., a public key of a PKI pair or the like), which may be embedded within the software and/or firmware initially installed on SSI 716 (e.g., at the manufacturer of SSI 716). The public certificate also may specify a validity period for the public certificate. Each subsequent update of the software and/or firmware may be digitally signed with a digital signature based on an encryption scheme (e.g., PKI) involving the public key.

When a purported software and/or firmware update is received at SSI 716 including a digital signature, code validation logic 713 may use the public key (and the validity period) in the public certificate to validate the digital signature and thereby verify the authenticity of the update, for example, by exchanging communications with a certification service or the like of the SSI 716 manufacturer or a trusted third-party, using known techniques. The security credentials 714, including the public certificate and perhaps other credentials, and credentials used for encrypting and decrypting data, may be embedded within the software and/or firmware on the SSI 716 so that they are not accessible by the host system 700 or any other entity connected to the SS1 716. For example, the security credentials 714 may be stored within a trusted platform module (TPM) or the like within SSI 716. If the code validation logic determines the software or firmware update to be invalid, the update may not be installed on SSI 716. Such verification of the software and/or firmware may prevent an attacker from replacing software and/or firmware on SSI 716 with code that would allow access to resources within storage system 620 a.

Storage metadata 722 may include any metadata about data stored on storage system 620 a, including but not limited to any of the metadata described herein. For example, storage MD 722 may include any of master device table 762, LSU table 772, thin device table 772′, track table 782 and cache slot table 750, corresponding to master device table 62, LSU table 72, thin device table 72′, track table 82 and cache slot table 500, respectively. For example, each of tables 762, 772, 772′, 782 and 750 may include at least a portion of the metadata stored in 762, 772, 772′, 782 and 750, respectively; e.g., metadata corresponding to physical storage devices 624, and logical storage devices associated therewith, being used for applications running on host system 700. Use of such metadata is described in more detail elsewhere herein.

IO processing logic 717 may include one or more components for performing IO operations in conjunction with storage system 620 a. In some embodiments, one or more of these components embody IO functionality, including data services, that is implemented on known storage systems. By implementing such IO functionality on SSI 716 instead of on the storage system 620 a, less storage system resources may be consumed, and overall IO performance on the storage system may be improved. IO processing logic 717 may include any of: device mapping logic 718; IO path logic 720; integrity logic 721; messaging logic 724; RDMA logic 725; atomic logic 726; back-end logic 728; other components; or any suitable combination of the foregoing.

Device mapping logic 718 may be configured to map logical addresses of logical storage devices to locations (i.e., physical addresses) within physical storage devices using, e.g., any one or more of tables 762, 772, 772′ and 782, 750.

Device mapping logic 718 may be configured to determine, from the retrieved metadata, the location(s) within cache 642 and/or within one or more physical storage devices 624 corresponding to the logical location specified in the IO operation. The IO operation (e.g., read or write) then may be performed with respect to the determined cache location and/or one or more physical storage device locations. In some embodiments, the device mapping logic 718, in coordination with one or more other components of IO processing logic 717, SSI 716 and/or host system 700, may perform aspects of IO operations, including exchanging communications with components of storage system 620 a over internal fabric 630, as described in U.S. patent application Ser. No. 16/389,383, titled “Host System Directly Connected to Internal Switching Fabric of Storage System,” to Wigmore et al., filed Apr. 19, 2019 (“Wigmore”), the entire contents of which are hereby incorporated by reference.

It should be appreciated that, while in some embodiments described herein, the metadata corresponding to a logical location may be used to determine a corresponding one or more locations in cache and/or a physical storage location, the metadata may include a variety of information other than location information, as described in more detail elsewhere herein, and may be used for any of a variety of other purposes, for example, by one or more components of host system 700 and/or storage system 620 a.

IO path logic 720 may be configured to determine what IO path within storage system 620 a to use to process an IO operation. IO path logic 720 may be configured to determine what path to take for an IO operation based on any of a variety of factors, including but not limited to whether the IO is a read or write; how complicated a state of the storage system is at the time the IO operation is being processed; whether the data specified by the IO operation is in a cache of the storage system; other factors; or a combination of the foregoing. For example, based on one or more of the foregoing factors, IO path logic 720 may determine whether to process an IO request by: sending a communication to a director; directly accessing a cache on the storage system (i.e., without using any compute resources of a director) or accessing a physical storage device without using a director (e.g., via an FDI). IO path logic 720 may be configured to determine what IO path within storage system 620 a to use to process an IO operation as described in more detail in Wigmore.

Integrity logic 721 may be configured to implement one or more data integrity techniques for IO operations. Some data storage systems may be configured to implement one or more data integrity techniques to ensure the integrity of data stored on the storage system on behalf of one or more host systems. One such data integrity technique is called DIF (data integrity field), or “T10DIF” in reference to the T10 subcommittee of the International Committee for Information Technology Standards that proposed the technique. Some storage systems, for example, in accordance with one or more technology standards, store data arranged as atomic storage units called “disk sectors” having a length of 512 bytes. T10 DIF adds an additional 8 bytes encoding a checksum of the data represented by the remaining 512 byes, resulting in data actually being stored as 520-byte atomic units, including 512 bytes of data and 8 bytes of checksum data in accordance with T10DIF. In embodiments of the invention in which storage system 620 a is implementing T10DIF, integrity logic 721 may be configured to implement T10DIF, thereby converting 512-byte units of data in IO communications received from host OS 701 to 520-byte units of data in accordance with T10DIF to be transmitted in IO communications to storage system 620 a. In such embodiments, integrity logic 721 also may be configured to convert 520-byte units of data in IO communications received from storage system 620 a to 512-byte units of data to be transmitted in IO communications to host OS 701. In such embodiments, data integrity on a storage network (e.g., storage network 600) may be improved by implementing T10DIF on an IO path from a host system to a physical storage device (e.g., end-to-end).

Processing IO operations in accordance with embodiments of the invention may include exchanging RDMA communications, control (e.g., command) communications and atomic communications between host system 700 and storage system 620 a. RDMA logic 725, messaging logic 724, and atomic logic 726, respectively, may be configured to implement such communications. Atomic communications involve performing exclusive locking operations on memory locations (e.g., at which one or more data structures described herein reside) from which data is being accessed, to ensure that no other entity (e.g., a director) can write to the memory location with other data. The exclusive locking operation associated with an atomic operation introduces a certain amount of overhead, which may be undesired in situations in which speed is of greater performance.

It may be desirable for host system 700; e.g., SSI 716, to know information (e.g., a state) of one or more physical storage devices 624, for example, whether a physical storage device is off-line or otherwise unavailable, e.g., because of garbage collection. To this end, in some embodiments, back-end logic 728 may monitor the status of one or more physical storage devices 624, for example, by exchanging communications with FDI 606 over internal fabric 630.

SSCI 729 may include logic for steering and routing IO communications to one or more ports 731 of SSI 716 physically connected to internal fabric 630, and may include logic implementing lower-level processing (e.g., at the transport, data link and physical layer) of IO communications, including RDMA, messaging and atomic communications. In some embodiments of the invention, communications between SSI 716 and components of storage system 620 a (e.g., directors 637, GM 640 and FDI 606) over internal fabric 630 may be encapsulated as NVMeoF command capsules in accordance with an NVMeoF specification. For example, SSCI 729 may include logic for encapsulating IO communications, including RDMA, messaging and atomic communications, in accordance with NVMeoF. Thus, in some embodiments, IO communications received from NVMe driver 702, configured in accordance with NVMe, may be converted to NVMeoF command capsule communications for transmission over the internal fabric 630. SSCI 729 also may include logic for de-capsulating NVMeoF command capsules, for example, into NVMe communications to be processed by IO processing logic 717.

SSCI 729 (and components of the storage system 620 a interfacing with the internal fabric 630) may be configured to address communication to other components; e.g., GM 640, FDI 606, directors 637, in accordance with one or more technologies being used to communicate over internal fabric 630. For example, in embodiments in which IB is employed to communicate over internal fabric 630, SSCI 729 may be configured to address communication to other components using IB queue pairs. Aspects of SSCI 729 may be implemented using a network adapter (e.g., card or chip), for example, a ConnectX®-5 or ConnectX®-6 dual-port network adapter available from Mellanox Technologies, Ltd. of Sunnyvale, Calif. (“Mellanox”), for example, as part of a SmartNIC.

SSI 716 may be implemented as a combination of software, firmware and/or hardware. For example, SSI 716 may include certain hardware and/or firmware, including, for example, any combination of printed circuit board (PCB), FPGA, ASIC, or the like, that are hardwired to perform certain functionality, and may include one or more microprocessors, microcontrollers or the like that are programmable using software and/or firmware (e.g., microcode). Any suitable microprocessor may be used, for example, a microprocessor including a complex instruction set computing (CISC) architecture, e.g., an x86 processor, or processor having a reduced instruction set computing (RISC) architecture, for example, an ARM processor. SSI 716 may be part of a microprocessor or separate therefrom. In embodiments in which a microprocessor is employed, any suitable OS may be used to operate the microprocessor, including, for example, a Linux operating system. In some embodiments, the combination of software, hardware and/or firmware may constitute a system-on-chip (SOC) or system-on-module (SOM) on which SSI 716 may be implemented, e.g., as part of a SmartNIC. For example, in some embodiments, SSI 716 may be implemented, at least in part, using a BlueField™ Multicore System On a Chip (SOC) for NVMe storage, available from Mellanox, which may be further configured with logic and functionality described herein to constitute a SmartNIC.

Returning to FIG. 6, FDI 606 and one or more of physical storage devices 624 may be configured to exchange IO communications in accordance with NVMe. Accordingly, FDI 606 may include an NVMe controller, e.g., at least similar to the NVMe controller 708, configured to exchange IO communication according to NVMe with physical storage devices 624. Further, FDI 606 may be configured with the same or similar functionality as SSCI 729. For example, SSCI 729 may include: logic for steering and routing IO communications to one or more of its ports physically connected to internal fabric 630, logic implementing lower-level processing (e.g., at the transport, data link and physical layer) of IO communications, including RDMA and messaging communications; logic for encapsulating IO communications to be sent from FDI 606 over internal fabric 630 to SSI 616, including RDMA and command messaging communications, in accordance with NVMeoF; logic for de-capsulating NVMeoF command capsules received from internal fabric 630, the decapsulated communication to be configured in accordance with NVMe for use by an NVMe controller of the FDI 606 for exchanging IO communications with physical storage devices 624.

FDI 606 may be implemented as a combination of software, firmware and/or hardware including, for example, any combination of printed circuit board (PCB), FPGA, ASIC, or the like, that are hardwired to perform certain functionality, and may include one or more microprocessors, microcontrollers or the like that are programmable using software and/or firmware (e.g., microcode). Any suitable microprocessor may be used, for example, a microprocessor including a complex instruction set computing (CISC) architecture, e.g., an x86 processor, or processor having a reduced instruction set computing (RISC) architecture, for example, an ARM processor. In some embodiments, the combination of software, hardware and/or firmware may constitute a system-on-chip (SOC) or system-on-module (SOM) on which FDI 606 may be implemented. For example, in some embodiments, FDI 606 may be implemented using a BlueField™ Multicore SOC for NVMe storage, available from Mellanox.

FIG. 8A is a flowchart illustrating an example of a method 800 of processing an IO request on a system in which a host system is directly connected to an internal fabric of a storage system, according to embodiments of the invention. Other embodiments of a method of processing an IO request on a system in which a host system is directly connected to an internal fabric of a storage system, for example, variations of method 800, are possible and are intended to fall within the scope of the invention.

In step 802, an IO request may be received, e.g., on an SSI (e.g., SSI 716) from an OS (e.g., 701) of a host system (e.g., host system 700). In embodiments in which NVMe is employed, the SSI may include an NVMe controller (e.g., NVMe controller 708) that receives an IO communication in the form of a submission queue entry (SQE) from an SQ (e.g., SQ 704 a) of an NVMe driver 702 of the OS. For example, the OS may place an SQE in the SQ for an IO operation, and the NVMe driver may “ring the doorbell” in accordance with NVMe, i.e., may issue an interrupt to the NVMe controller on the SSI, or the NVMe controller may iteratively poll the SQ until an SQE is ready.

In step 803, the IO request (e.g., specified in an SQE) may be read, for example, by the NVMe controller, and, in step 804, it may be determined whether the request is valid, for example, using IO validation logic 711. For example, it may be determined whether the IO communication is a valid NVMe communication and/or whether the IO communication is authorized, for example, as described in more detail elsewhere herein. If it determined in step 804 that the IO request is invalid, the IO request may be rejected (e.g., dropped) in step 806.

If it is determined that the IO request is valid, then it may be determined in step 808 whether the IO request specifies a read or write operation. If it is determined in step 808 that the request specifies a write operation, then write processing may be performed in step 810. Write processing may include sending a write request over internal fabric 630 to one of directors 637 serving and as FA, and the FA may process the write operation, for example, using known techniques. Step 810 may be performed as described in relation to FIG. 9.

If it is determined in step 808 that the IO request specifies a read operation, then read processing may be performed in step 812, for example, in accordance with method 812′ described in relation to FIG. 8B.

FIG. 8B is a flowchart illustrating an example of a method 812′ of processing a read operation, according to embodiments of the invention. Other embodiments of a method of processing a read operation, for example, variations of method 812′, are possible and are intended to fall within the scope of the invention.

In step 814, metadata corresponding to the data specified in a read operation may be accessed. For example, the read operation may specify a logical storage device (e.g., a LUN or an NVMe namespace), and logical locations (e.g., one or more data portions and/or logical device tracks defining one or more logical address ranges) within the logical device. IO processing logic 717 may access one or more of data structures 762, 772, 772′, 782 and 750 of storage metadata 722 to obtain and/or determine metadata (e.g., one or more physical storage devices and physical address ranges therein) corresponding to the logical storage device and one or more logical locations. It may be determined that none of the data structures of storage metadata 722 have current information (or no information) about the specified logical storage device or the specified logical location(s) thereof, and step 814 may include sending read requests (e.g., RDMA read requests) directly to global memory (e.g., global memory 640) of the storage system for current information. Such requests may be configured as atomic operations.

In step 816, it may be determined whether the storage system (e.g., storage system 620 a), or a component thereof pertinent to the data to be read (e.g., a LUN or namespace of the data) is currently in a complex state, for example, based on the metadata accessed in step 814. For example, it may be determined that one or more particular data services (e.g., replication, backup, offline data deduplication, etc.) are currently being performed on the LUN of the data. In some embodiments of the invention, if the state of the storage system is too complex, e.g., as a result of a particular data service currently being performed, it may be desirable to use a director to process the read operation, to utilize the processing power and metadata available to the director. If it is determined in step 816 that the storage system is in a complex state, then read processing may be performed using a director (e.g., one of directors 637) in step 818.

If it is determined in step 816 that the storage system is not in a complex state, then it may be determined in step 820 whether the data specified in the read request is in a cache (e.g., cache 642) of the storage system, for example, from the metadata accessed in step 814. If it is determined in step 820 that the specified data is in cache, then the data may be read directly from cache in step 822, for example, as described in more detail elsewhere herein.

If it is determined in step 820 that the specified data is not in cache, then the physical storage location of the data may be determined in step 824, for example, from the metadata accessed in step 814, and the specified data may be read from the physical storage device independent of any director on the storage system in step 826, for example, as described in more detail elsewhere herein.

FIG. 9 is a timing diagram illustrating an example of a method of performing a write operation, according to embodiments of the invention. Other embodiments of a method of performing a write operation, for example, variations of the method illustrated in FIG. 9, are possible and are intended to fall within the scope of the invention. The write operation may be performed as part of write processing 810. Each communication between SSI 716 and storage system 620 a described in relation to FIG. 9, or in relation to FIGS. 10 and 11, may be transmitted over the internal fabric 630 of the storage system 620, for example, as an NVMeoF command capsule. In the embodiments illustrated in FIGS. 9-11, SSI 716 may be considered a first physical part of host system 700 and the remainder of the host system 700 may be considered a second physical part 715 of the host system.

After it has been determined that the IO operation is a write operation, for example, as described above in relation to step 808, the data for the write operation may be transmitted from NVMe driver 702 to the SSI 716 in communication 902, e.g., over a peripheral device interconnect 703 (e.g., configured as a PCIe interconnect), and may be stored in memory 723. This movement of data may be considered a staging of the data in SSI 716 before the data is ultimately written to the storage system 620 a. However, in some embodiments, this staging step may not be necessary, as the SSI 716 may be configured to control transmitting the data directly from the NVMe driver 702 to the storage system as part of performing communication 910 described in more detail below, as illustrated by dashed line 908. In such embodiments, communication 902 may not be performed.

Communication 904 may be a write command message sent from SSI 716 to director 637, for example, as an NVMeoF command capsule, specifying the write operation, which may include the logical storage device and one or more data portions and/or logic tracks representing one or more logical address ranges within the logical storage device. When the director 637 is ready to receive the data, it may send communication 906 back to the SSI 716 requesting that the data (i.e., the payload) of the write operation be transmitted to the director 637. For example, communication 906 may be an RDMA read request because it is a read operation from the perspective of the director, even though the overall operation being performed is a write operation. In response to receiving communication 906, SSI 716 may send communication 910 including the requested data. Communication 910 may be an RDMA communication. As should be appreciated, an RDMA (remote direct memory access) transfer does not require use of any CPU resident on SS1 716, thus preserving compute resources. In some embodiments in which the write data is not first staged in SSI 716, data may be sent from NVMe driver 702 to director 637 without first being staged in memory (e.g., memory 723) on SSI 716, as illustrated by dashed line 908.

The director 637 may perform processing 911 on the write operation, for example, in accordance with known techniques, and then send communication 912, for example, as an NVMeoF command capsule, acknowledging that the write operation is complete. SSI 716 (e.g., NVMe controller 708) may send communication 914, for example, as a completion queue entry (CQE) to NVMe driver 702, indicating that the write operation is complete, and one or more other communications (e.g., including a PCIe MSI-X interrupt) may be exchanged to complete the write transaction between NVMe driver 702 and SSI 716. NVMe driver 702 may process the CQE, and the completion of the write operation may be processed by other components of host system 700.

FIG. 10 is a timing diagram illustrating an example of a method of a host system 700 reading data directly from a cache of a storage system 620 a, independent of any director compute resources, according to embodiments of the invention. Other embodiments of a method of a host system reading data directly from a cache of a storage system, for example, variations of the method illustrated in FIG. 10, are possible and are intended to fall within the scope of the invention.

As described elsewhere herein, after it has been determined that the IO operation is a read operation, for example, as described above in relation to step 808, metadata corresponding to the data specified in a read operation may be accessed. For example, the read operation may specify a logical storage device (e.g., a LUN or an NVMe namespace), and one or more logical locations (e.g., data portions logical device tracks) within the logical device. IO processing logic 717 may access one or more of data structures 762, 772, 772′, 782 and 750 of storage metadata 722 to determine metadata (e.g., one or more physical storage devices and one or more physical address thereof) corresponding to the logical storage device and one or more logical locations specified in the read operation. It may be determined that one or more of the data structures of storage metadata 722 does not have current information (or no information) about the specified logical storage device and/or location. If such a determination is made, SSI 716 may send one or more read requests 1002 (e.g., RDMA read requests) directly to global memory 640 for current metadata concerning the data of the read operation. Such requests may be configured as atomic operations to lock the memory locations of the metadata (e.g., portions of 62, 72, 72′, 82 and 500 associated with the data to be read). In some embodiments, to avoid the computational overhead and delay associated with performing a lock, communications 1002 are not performed as atomic operations. The current metadata may include any of a variety of metadata described in more detail elsewhere herein.

The current metadata corresponding to the read request may be sent in one or more responses 1004 from the global memory 640 to SSI 716. The IO processing logic (e.g., the IO path logic 720) of the SSI 716 may determine from the metadata (e.g., in performance of step 820) that the data for the read operation is in cache 642 (i.e., in one or more cache slots thereof), i.e., that there is a read cache hit. In response to the determination of a read cache hit, SSI 716 may send communication 1006 to cache 642 of global memory 640. Communication 1006 may be an atomic operation to lock the memory locations of the one or more cache slots identified in the metadata for the read operation, and obtain the cache-slot header(s) for the one or more cache slots. In some embodiments, to avoid the computational overhead and delay associated with performing a lock, communication 1006 is not performed as an atomic operation. In response, global memory 640 (e.g., cache 642) may send communication 1008 to SSI 716 including the contents (e.g., one or more timestamps reflecting when the current contents of the cache slot were populated and/or accessed as well as other metadata) of the one or more cache slot headers.

SSI 716 (e.g., IO processing logic 717) may read the contents of communication 1008 and send read request 1010 for the data within the one or more cache slots, and global memory 640 may send the data 1011, for example, as an RDMA communication. In some embodiments, the sent data is not staged in memory of SSI 716 before being sent to NVMe driver 702, as indicated by dashed line 1012. In some embodiments, before sending the data read from cache to NVMe driver 702, SSI 716 may stage the data (e.g., in memory 723). Further, if communication 1006 was not an atomic operation that locked the cache slot, SSI 716 may send communication 1013 to global memory requesting the cache slot header(s) again, to ensure that the cache slot header information has not been changed (e.g., by a director 637) since communication 1008, which would mean that the cached data has changed.

In response to communication 1013, global memory may send communication 1014 to SSI 716 including the current contents of the one or more cache slot headers. SSI 716 then may compare the contents to the contents of the one or more cache slot headers received in step 1008. If the contents do not match, i.e., the cache slot header has changed, then the metadata may be re-read in communications 1002-1004. If it is determined that the data is still in cache, then communications 1006-1014 may be repeated. However, if the metadata reveals that the data is no longer in cache, e.g., it has been evicted in accordance with cache policy, then the data may be read from one or more physical storage devices, for example, by performing action 1105-1116 described in relation to FIG. 11. Re-checking the cache slot header has minimal overhead in comparison to performing an atomic operation. Thus, as long as it is not too frequent that the contents of the one or more cache slot headers change between communication 1008 and 1013, thereby requiring a re-read of the data from cache or one or more physical storage devices, performing non-atomic read operations (i.e., “lockless reads” may be desirable from a performance perspective.

If it is determined (e.g., by IO processing logic 717) that the contents of the one or more cache slot headers has not changed since communication 1008; i.e., if the cache slot contents are validated, then a communication 1018 including the data for the read operation, read from the one or more cache slots, may be sent from SSI 716 (e.g., from NVMe controller 708) to NVMe driver 702 in accordance with NVMe as described in detail elsewhere herein. One or more other communications may be exchanged to complete the read transaction between NVMe driver 702 and SSI 716. NVMe controller 702, and other components of host system 700 in-turn may process the read data.

Each of communications 1006, 1008, 1010, 1011, 1012, 1013, 1014, 1018, 1020 and 1022 may be performed as part of performance of various embodiments of step 822 of method 800.

As described in more detail elsewhere herein, for read cache hits in known systems, data may be read along an IO path including the host system, an external network, director compute resources, a global memory, and perhaps an internal fabric. In contrast, in embodiments of the invention, for example, as described in relation to FIG. 10, for read cache hits, data may be read along an IO path including the host system, an internal fabric and a global memory. That is, the external network and director compute resources may not be used, which may produce reduced response times for read cache hits.

FIG. 11 is a timing diagram illustrating an example of a host system 700 reading data from a physical storage device of a storage system 620 a independent of any director 637, according to embodiments of the invention. Other embodiments of a method of a host system reading data directly from a physical storage device of a storage system 620 a, for example, variations of the method illustrated in FIG. 11, are possible and are intended to fall within the scope of the invention.

As described elsewhere herein, after it has been determined that the IO operation is a read operation, for example, as described above in relation to step 808, metadata corresponding to the data specified in a read operation may be accessed. For example, the read operation may specify a logical storage device (e.g., a LUN or an NVMe namespace), and one or more logical locations (e.g., data portions logical device tracks) within the logical device. IO processing logic 717 may access one or more of data structures 762, 772, 772′, 782 and 750 of storage metadata 722 to determine metadata (e.g., one or more physical storage devices and one or more physical address thereof) corresponding to the logical storage device and one or more logical locations specified in the read operation. It may be determined that one or more of the data structures of storage metadata 722 does not have current information (or no information) about the specified logical storage device and/or location. If such a determination is made, SSI 716 may send one or more read requests 1002 (e.g., RDMA read requests) directly to global memory 640 for current metadata concerning the data of the read operation. Such requests may be configured as atomic operations to lock the memory locations of the metadata (e.g., portions of 62, 72, 72′, 82 and 500 associated with the data to be read). In some embodiments, to avoid the computational overhead and delay associated with performing a lock, communications 1002 are not performed as atomic operations. The current metadata may include any of a variety of metadata described in more detail elsewhere herein.

The current metadata corresponding to the read request may be sent in one or more responses 1004 from the global memory 640 to SSI 716. The IO processing logic (e.g., the IO path logic 720) of the SSI 716 may determine from the metadata (e.g., in performance of step 820) that the data for the read operation is not in cache 642 (i.e., not in one or more cache slots thereof), i.e., that there is a read cache miss. In response to the determination of a read cache miss, SSI 716 (e.g., device mapping logic 718) may perform processing 1105 to determine the one or more physical storage devices and physical address ranges therein corresponding to the logical storage device and one or more logical locations specified in the read operation. For example, the read operation may specify a logical storage device ID and one or more data portion IDs and/or logical track IDs of data portion(s) and/or logical track(s), respectively, within the logical storage device. Device mapping logic 718 may access the corresponding entries in master device table 762, logical device table 772, thin device table 772′ and/or track table 782 to determine the one or more physical storage devices and physical address ranges therein corresponding to the logical storage device ID and one or more data portion IDs and/or logical track IDs.

After determining the one or more physical storage devices and one or more physical address ranges thereof, SSI 716 may send one or more communications 1106 to FDI 606. Each of one or more communications 1006 may be a read command message (e.g., an NVMeoF command capsule) specifying the one or more determined physical storage devices and physical address range(s) therein. FDI 606 may perform processing 1109 to read the read command message and retrieve the data from the specified one or more determined physical storage devices and physical address range(s). FDI 606 may send one or more communications 1110 including the retrieved data, for example, an RDMA write operation (albeit the overall operation is a read operation) encapsulated within an NVMeoF command capsule. SSI 716 may stage the received data (e.g., in memory 723) before sending the data to NVMe driver 702, or, in some embodiments, not stage the read data in memory of SSI 716 and send it to NVMe driver 702, as indicated by dashed line 1111.

In some embodiments, if communications 1002 were not atomic operations that locked memory locations of the metadata corresponding to the read data, SSI 716 may send communication 1114 to global memory requesting the metadata again, or at least a portion of the metadata, for example, one or more track table entries corresponding to the read data, to ensure such metadata has not changed (e.g., by a director 637) since communications 1004, which may have happened if communications 1002 were not atomic operations that locked the memory locations of the data structures holding the metadata.

In response to communication 1114, global memory may send communication 1116 to SSI 716 including the current contents of the one or more metadata structures (or portions thereof) requested. SSI 716 may compare the current contents to contents received in communication 1004. If the contents do not match, i.e., the metadata has changed, then, if communications 1114-1116 involved retrieving all the same metadata as communications 1002 and 1004, then such metadata may be used to determine whether the data is now in cache. If communications 1114-1116 did not retrieve all the same metadata as communications 1002 and 100, then communications 1002-1116 may be repeated and the retrieved metadata used to determine whether the data is now in cache. If it is determined that the data is still now in cache, then communications 1006-1014 described in relation to FIG. 10 may be repeated. However, if the metadata reveals that the data is still not in cache, then actions 1105-1116 may be repeated. Re-checking the metadata has minimal overhead in comparison to performing an atomic operation. Thus, as long as it is not too frequent that the contents of the relevant metadata changes between communication 1004 and 1114, thereby requiring a re-read of the data from cache or one or more physical storage devices, performing non-atomic read operations (i.e., “lockless reads” may be desirable from a performance perspective.

If it is determined (e.g., by IO processing logic 717) that the contents of the metadata has not changed since communication 1004; i.e., if the metadata is validated, then a communication 1118 including the data for the read operation, read from one or more physical storage devices, may be sent from SSI 716 (e.g., from NVMe controller 708) to NVMe driver 702 in accordance with NVMe as described in detail elsewhere herein. One or more other communications may be exchanged to complete the read transaction between NVMe driver 702 and SSI 716. NVMe controller 702, and other components of host system 700 in-turn may process the read data.

Each of actions 1105, 1106, 1110, 1111, 1114, 1018, 1116, 1118, 1120 and 1122 may be performed as part of performance of various embodiments of steps 824 and 826, collectively, of method 800.

As described in more detail elsewhere herein, for read cache misses in known systems, data may be read along an IO path including the host system, an external network, an FA (director), a global memory, an internal fabric, a BE (director) and physical storage device. In contrast, in embodiments of the invention, for example, as described in relation to FIG. 11, for read cache misses, data may be read along an IO path including the host system, an internal fabric, an FDI and a physical storage device. That is, the external network and multiple directors may be bypassed, which may produce reduced response times for read cache misses.

As described above, in some embodiments, it may be determined in step 816 that a state of the storage system is complex, such that a director (e.g., one of directors 637) may perform read processing. In such embodiments, SSI 716 may exchange NVMeoF communications with a director, and the read data may be transmitted from the director to the SSI 716, for example, as an RDMA communication, and then to operating system 701, for example, to the NVMe driver 702 in accordance with NVMe.

As described in more detail elsewhere herein, in some embodiments of the invention, it may be desirable to reduce a number of communications exchanged between a host system and a storage system when executing a read operation, for example, when executing a direct read operation.

FIG. 12 is a flow chart illustrating an example of a method 1200 of performing a read operation, for example, to reduce a number of communications exchanged between a host system and a storage system when executing a read operation, e.g., when executing a direct read operation, according to embodiments of the invention. Other embodiments of a method of performing a read operation, for example, variations of the method 1200, are possible and are intended to fall within the scope of the invention. The method 1200 may be performed, for example, by one or more components of the IO processing logic 717, in conjunction with one or more components of the storage system 620 a, as described in more detail elsewhere herein.

In a step 1202, a read request specifying a data portion may be received on a host system from an application executing on the host system. For example, a read request may be received from a host application executing on host system 700, which may result in a read request being sent from the OS 701 (e.g., from the NVMe driver 702) of the host system 700 to the host interface 706 (e.g., to the NVMe controller 706) of the SSI 716 as part of performance of the step 802.

In a step 1204, in response to receiving the read request, a read metadata instruction may be sent from the host system (e.g., the SSI 716 of the host system 700) to the storage system (e.g., the storage system 620 a). For example, a metadata read request may be sent as an NVMe VU (vendor unique) command from SSI 716 to a director 637 of the storage system 620, e.g. a director configured to serve as an FA in accordance with NVMe. The host system (e.g., one or more components of the IO processing logic 717) may be configured to include information (e.g., a flag) in the metadata read instruction indicating that the host system is capable of processing metadata responses that include the data portion itself.

In some embodiments of the invention, the metadata necessary for determining a state and location of data portion are included on the host system itself, for example, in one or more data structures 762, 772, 772′, 782 and 750 of the storage metadata 722 of the SSI 716. In such embodiments, the steps 1204-1210 may not be performed, and method 1200 may proceed from the step 1202 to the step 1212.

In a step 1205, it may be determined by the storage system whether the data portion is available. For example, a director serving as an FA that received the read request may determine that the data portion is in a complex state; i.e., that the LSU of the data portion is in a complex state, e.g., in which the data portion is currently unavailable because one or more data services is currently being performed on the LSU, such as, for example, replication, backup, snap, offline data deduplication, etc.

If it is determined in the step 1205 that the data portion is available, then, in a step 1206, it may be determined by the storage system (e.g., via access to one or more of data structures 62, 72, 72′, 82 and 500) whether the data portion is in the cache (e.g., 643) of the storage system (e.g., 620 a). If it is determined that the data portion is in the cache, then in a step 1208 a metadata response may be sent back to the host system that includes the state and location of the data portion, as well as the data portion itself. That is, rather than exchanging one or more additional communications (e.g., 1006, 1008, 1010, 1011, 1013 and 1014) described in more detail elsewhere herein to obtain the data portion from cache, the data portion from cache may be included in the metadata response, for example, as part of one or more communications 1004 described in more detail elsewhere herein. The storage system (e.g., a director serving and an FA) may be configured to determine from a metadata request instruction (e.g., from reading a flag within an NVMe VU command) whether the requesting host system (e.g., the host system 700) is capable of reading (e.g., extracting) a data portion appended to a metadata response, and may be configured to append the data portion to a metadata response if it determines that the requesting host system is capable of reading it from the metadata response.

The host system (e.g., one or more components of the IO processing logic 717) may be configured to determine whether the metadata response sent from the storage system, for example in the step 1208 (or in a step 1210 described below), includes the data portion, and, if so (e.g., in the case of the response sent in the step 1208), to extract the data portion from the metadata response, and to refrain from sending a separate data request (e.g., one or more communications 1006, 1010 and 1013) to retrieve the data portion from cache.

If it is determined in the step 1205 that the data portion is currently unavailable on the storage system, or it is determined in the step 1206 that the data portion is not in the cache of the storage system, then the method 1200 may proceed to the step 1210. In the step 1210, the storage system may respond to the read metadata instruction sent in the step 1204 with a metadata response that specifies the state and the location of the data portion, but does not include the data portion itself. For example, the state may specify that the data portion is currently available or unavailable (e.g., a data service is currently being performed on it), and the location may specify a physical storage device and location thereon (e.g., an LBA range).

In a step 1212, it may be determined by the host system whether the data portion is available, for example, by examining the state information included in the metadata response. If the data portion is available, then one or more read data instructions may be sent to the storage system in the step 1216, for example, to the one or more physical storage devices on which the data portion resides.

In embodiments in which the metadata necessary for determining a state and location of data portion are included on the host system itself, such that steps 1205-1210 were not performed, and such that the data portion was not returned from the cache in step 1208 if the data portion were in the cache, the step 1216 may include sending a data read instruction to the cache of the data storage system, for example, as described above in relation to the step 822, e.g., as part of the communication 1013.

If it is determined in the step 1212 that the data portion is currently unavailable or the state is otherwise too complex, then the read operation may be handled in the step 1214 other than by performing the step 1216. For example, director read processing may be performed as described in relation to the step 818, or the host system may continue to poll the storage system in the step 1204 (as indicated by the dashed line from the step 1208 to the step 1204) until the data portion is available. In some embodiments of the invention, if the state of the storage system is too complex, e.g., as a result of a particular data service currently being performed, it may be desirable to use a director to process the read operation, to utilize the processing power and metadata available to the director.

Various embodiments of the invention may be combined with each other in appropriate combinations. Additionally, in some instances, the order of steps in the flowcharts, flow diagrams and/or described flow processing may be modified, where appropriate. It should be appreciated that any of the methods described herein, including methods 800, 812′ and 1200, and methods described in relation to FIGS. 9-11, or parts thereof, may be implemented using one or more of the systems and/or data structures described in relation to FIGS. 1-7, or components thereof. Further, various aspects of the invention may be implemented using software, firmware, hardware, a combination of software, firmware and hardware and/or other computer-implemented modules or devices having the described features and performing the described functions.

Software implementations of embodiments of the invention may include executable code that is stored one or more computer-readable media and executed by one or more processors. Each of the computer-readable media may be non-transitory and include a computer hard drive, ROM, RAM, flash memory, portable computer storage media such as a CD-ROM, a DVD-ROM, a flash drive, an SD card and/or other drive with, for example, a universal serial bus (USB) interface, and/or any other appropriate tangible or non-transitory computer-readable medium or computer memory on which executable code may be stored and executed by a processor. Embodiments of the invention may be used in connection with any appropriate OS.

As used herein, an element or operation recited in the singular and preceded with the word “a” or “an” should be understood as not excluding plural elements or operations, unless such exclusion is explicitly recited. References to “one” embodiment or implementation of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features. Furthermore, a description or recitation in the general form of “at least one of [a], [b] or [c],” or equivalent thereof, should be generally construed to include [a] alone, [b] alone, [c] alone, or any combination of [a], [b] and [c]. In addition, use of a an ordinal term, e.g., “first,” “second” or the like, to qualify a term for an item having multiple instances of the same name does not necessarily indicated a priority, precedence or temporal order between the instances unless otherwise indicated, but rather such ordinal terms may be used merely to distinguish between the separate instances.

Other embodiments of the invention will be apparent to those skilled in the art from a consideration of the specification or practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the invention being indicated by the following claims. 

What is claimed is:
 1. On a data storage system, a method comprising: receiving an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from the storage system; in response to receiving the instruction, determining whether the data portion is present in a cache of the data storage system; and if the data portion is present in the cache, sending a response to the instruction that includes a location of the data portion in the cache and the data portion itself.
 2. The method of claim 1, further comprising: if the data portion is not present in the cache, sending a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself.
 3. The method of claim 1, further comprising: refraining from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction.
 4. The method of claim 1, further comprising: sending the instruction from a host system to the data storage system.
 5. The method of claim 4, wherein the host system is directly connected to an internal fabric of the storage system, and wherein the instruction is sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system.
 6. The method of claim 4, wherein the instruction is sent in response to receiving the read request from the host application.
 7. The method of claim 6, wherein the storage system includes an operating system and a storage system interconnect directly connected to an internal fabric of the storage system, wherein the operating system communicates with the storage system interface over one or more peripheral device interconnects, wherein the operating system receives the read request specifying a read operation, and, in response to receiving the read request, sends an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface, and wherein the storage system interface sends the instruction in response to receiving the IO communication from the operating system.
 8. A storage system comprising: a cache; one or more processors; and a memory comprising code thereon that, when executed, performs a method comprising: receiving an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from the storage system; in response to receiving the instruction, determining whether the data portion is present in the cache; and if the data portion is present in the cache, sending a response to the instruction that includes a location of the data portion in the cache and the data portion itself.
 9. The storage system of claim 8, wherein the method further includes: if the data portion is not present in the cache, sending a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself.
 10. The storage system of claim 8, wherein the method further includes: refraining from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction.
 11. The storage system of claim 8, wherein the method further includes: sending the instruction from a host system to the data storage system.
 12. The storage system of claim 11, wherein the host system is directly connected to an internal fabric of the storage system, and wherein the instruction is sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system.
 13. The storage system of claim 11, wherein the instruction is sent in response to receiving the read request from the host application.
 14. The storage system of claim 13, further comprising: an operating system; and a storage system interconnect directly connected to an internal fabric of the storage system, wherein the operating system communicates with the storage system interface over one or more peripheral device interconnects, and wherein the method further includes: the operating system receiving the read request specifying a read operation; in response to receiving the read request, the operating system sending an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface; and the storage system interface sending the instruction in response to receiving the IO communication from the operating system.
 15. Computer-readable media having software stored thereon, the software comprising: executable code that receives an instruction to read metadata for a data portion in association with a read request made by a host application to read the data portion from a storage system; executable code that, in response to receiving the instruction, determines whether the data portion is present in a cache of the storage system; and executable code that, if the data portion is present in the cache, sends a response to the instruction that includes a location of the data portion in the cache and the data portion itself.
 16. The computer-readable media of claim 15, wherein the software further comprises: executable code that, if the data portion is not present in the cache, controls sending a response to the instruction that includes a location of the data portion in the cache, and does not include the data portion itself.
 17. The computer-readable media of claim 15, wherein the software further comprises: executable code that refrains from sending a separate read instruction to the cache to retrieve the data portion based on the data portion being included in the response to the instruction.
 18. The computer-readable media of claim 15, wherein the software further comprises: executable code that controls sending the instruction from a host system to the data storage system.
 19. The computer-readable media of claim 18, wherein the host system is directly connected to an internal fabric of the storage system, and wherein the instruction is sent from the host system to the global memory of the storage system on the internal fabric independent of any director of the storage system.
 20. The computer-readable media of claim 18, wherein the instruction is sent in response to receiving the read request from the host application, wherein the storage system includes an operating system and a storage system interconnect directly connected to an internal fabric of the storage system, wherein the operating system communicates with the storage system interface over one or more peripheral device interconnects, and wherein the software further comprises: executable code that controls the operating system to receive the read request specifying a read operation, and, in response to receiving the read request, to send an IO communication specifying the read operation over one of the one or more peripheral device interconnects to the storage system interface; and executable code that controls the storage system interface to send the instruction in response to receiving the IO communication from the operating system. 